• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 47 subscribers
  • Views 382 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS8528: Behavior of parallel data bus during AVDD=0V

ttd
Mastermind 9085 points

Part Number: ADS8528

Dear Technical Support Team,

Unexpected data appears on DB[15:0]  during AVDD =0V.

Normally DB[15:0]  are 3.3V when  AVDD=5V but about these are about 1.6V when AVDD=0V.

Supply voltages while power-on are following.

AVDD:0V 

DVDD:3.3V

HVDD:15V

HVSS:-15V

"Power Supply Recommendations" describes below. Does it affect DB[15:0] ?

----------------------

However, when HVDD is supplied before AVDD, the internal electrostatic discharge (ESD) structure conducts, increasing the IHVDD beyond the specified value until AVDD is applied.

----------------------


Best Regards,

ttd

  • 0
    TI__Mastermind 25070 points
    Hello,

    Although there might not be specific power sequencing requirements, it is best practice to bring up AVDD and DVDD together, or AVDD first. We cannot guarantee behavior during your stated condition; but with only half the device powered, it does make sense that DB[15:0] would not be properly driven.
    -Cynthia