Other Parts Discussed in Thread: ADC12DJ3200EVM
Hi,
I am using an FMC board with ADC32rf45 on a FPGA carrier board with kintex ultrascale 115 FPGA on it. I was wondering if you could provide me with a reference design for the JESD204B IP core part on FPGA. ADC works at 12 bit bypass mode where LFMS=82820. sampling rate is 3GHz with lane rate of 12Gbps.
Erdal
