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PGA900: Estimating power consumption

Dwight Meglan
Prodigy 30 points

Part Number: PGA900

I've read through the data sheet for the PGA900 and have tired to figure out how to estimate its power consumption. I'd like to confirm my approach to estimation since there is no direct info on this in the data sheet that i can find.

I am interested in getting a rough estimate for it working with two wheatstone bridge based pressure transducers. At the moment, the details of those transducers is not set so I can't say what the base resistance will be --- I am using a typical gage value of 1000ohm for now (350 is common as well).

This estimate is important in my application because I am looking to run this off a battery and I need get a rough sizing estimate for a week's operation time.

Section 6.3 for the data sheet says the max current in normal operation is 2.5mA -- that is without excitation of the bridge. I am expecting to supply the chip with 3.3V from a voltage regulated LiOn battery.

Section 6.10 says that typical bridge excitation voltage is 2.5V and typical current supply to bridge is 1.5mA. This current draw seems at least somewhat consistent for 1000 ohm bridges.

Using the above, I get 8.25mW for the chip plus an additional 3.75mW for the bridge. I am running two bridges so 7.5mW for them. Meaning an overall power consumption of 16.25mW

Does this estimate sound right?

  • 0
    Prodigy 30 points
    OK, I can't add -- 15.75mW
  • 0
    TI__Mastermind 31655 points
    Hi Dwight,

    The current supply spec for the bridge is the max spec, so you should expect 1.5mA total for both bridges. Additionally, the 2.6mA spec for the normal operation does not include any load on the DAC output. This will vary considerably depending on the output mode. For example in 4-20mA current output mode, the total power will of course vary with the output, but will never be below 4mA*VPWR. This is likely not the most power efficient option for a battery-powered application, so voltage output mode is preferable in this case. Even in this case the power consumption will be affected by the output value and the load on the DAC output.

    Regards,
  • 0 in reply to Scott Cummins
    Prodigy 30 points
    Thanks for the followup. I am planning to use it in either I2C or SPI -- may end up being SPI because the other sensor I am using will be SPI. What are the implications of the power drain for that versus voltage/current mode?

    I looked through the programming info and I thought I saw at least analog power shutdown. Can I selectively power up the chip and take a measurement and power it back down? That would save a lot of battery for me. I can do a very low sample, like once per minute.

    I realize I could externally switch the power on/off, but I am hoping that the chip has its own way to do this as I have seen in other chips.
  • 0 in reply to Dwight Meglan
    TI__Mastermind 31655 points

    Hi Dwight,

    Outputting via the digital interfaces will certainly require less power than using one of the analog output modes. The device does have this functionality, but it requires a bit of extra firmware development since not all registers are directly accessible when the internal M0 microprocessor is running. Pulling the ADC registers directly while the M0 is in reset is possible, but it is likely that the values will update between reading each byte of the the data. The best way to access this data is to use the COMBUF registers. The M0 will read the ADC data into a buffer register that is accessible to the digital interfaces even when the M0 is running.

    And yes, there is a register that can power off the analog blocks.


    Regards,