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AMC1304L05: Behavior of ADC across isolated power supply

Part Number: AMC1304L05

Hello,

according to the datasheet (revision 2017) the AMC1304L05 has a fail safe function. §8.4.1. Fail-Safe Output says:  "In the case of a missing high-side supply voltage (LDOIN), ..." "Therefore, the AMC1304 implements a fail-safe output function". We use this function successfully together with logic in an FPGA. It will trigger an error if the ADCs datastream does not toggle within 128 clock cycles.
The AMC1304L05 is specified for LDOIN between 4 to 18VDC. We use it with 5V generated by an digital isolator (ADuM64xx).

In our application we trigger an error, if the primary power rail for the isolators drops below 4V. In case of VCCprimary < 4.5V the isolators try to generate 5V but this is not guaranteed. It might be anything between below 4V (due to losses) up to 5V.

The word "missing" in the AMC1304L05 datasheet is somehow unclear, however, as it implies that this error function is only active when LDOIN = 0V.

In FMEA and hasard rate discussions the following question was asked. What is the behavior of the ADCs error function in case of 0V < LDOIN <4V.  We could not find any information about this point in the datasheet. Does the error handler raise an error (no toggling of data lines) or is it simply unspecified and it is up to the user to supervise the power supply for LDOIN?

Thank You very much in advance for clarification

Robert

  • Hi Robert,

    Great question on the AMC1304L05 here! Let me check with the design team to see what happens during power up, when LDOin is technically 'undefined' in the 0-4V range. It will probably be Monday before we have some additional detail for you.
  • Hi Robert,

    What we see in the lab with the AMC1304L05, is that the 4V min to LDO in is the point at which the voltage on VCAP remains fixed (regulated). If the value of LDOIN drops down to about 2.3V, the output bitstream will go to the fail-safe level, this is true for shorted inputs (50% 1's and 50% 0's on DOUT) or if you are saturated high or low on VIN where you get the single output pulse every 128 CLKIN cycles. On bringing the LDOIN voltage up, the outputs become active at ~2.5V.
  • Hi Tom,

    thank You very much for Your answer.

    This behaviour is excellent. As we trigger an error at 4V on the primary side (which, due to several reasons might lead to a slightly lower voltage at the isolated side) this still leaves quite some margin.

    The behaviour You saw in Your lab experiment suggests that there is a power supply supervisor integrated in the ADC which makes shure an error is signalled at voltages below 2.3V (2.5V) (and maybe >xxV?). If I remember correctly these limits are not specified in the datasheet, though (the only value I found is a typical value for VCAP).
    As we use this ADC in a SIL-4 railway application the whole system is examined by TUeV in Munich (which is a certified body for railway applications). It is their job to challenge everything, even the unthinkable. Therefore I already hear them asking "ok, where is that specified? We don't find anything in the datasheet".

    Is there a specification from TI (e.g. from characterization tests) where this behaviour has been tested and which might be available? Or is it guaranteed by design that either correct data is available or an error is signalled?

    Thanks You very much for Your help.

    Best regards

    Robert

  • Hi Robert,

    I know SIL-4 and I've dealt with TÜV myself, so I know what you are going through. The testing we did in the lab was more of a curiosity analysis versus performance analysis.

    From the standpoint of performance, we cannot guarantee that the bit stream you get out of the device will be accurate with LDOIN below 4.0V. For the "ok, where is this specified", what you can do is point them to the note at the top of the Electrical Characteristics tables (i.e. the note under section header 7.10), which describes the operating conditions for MIN/MAX values and the typical values. For all min/max values, LDOIN was swept from 4.0 to 18.0V over the entire operating temperature range of -40 to 125' C.

    For margin on your error trigger, what I might be able to get you is characterization data on the stability of the regulator at VCAP - this came into regulation with around 3.8V on LDOIN which makes sense to me given the 3.45V typical VCAP voltage listed in the datasheet. This voltage regulator drives the internal reference which is used in the conversion process of the modulator. Without a stable reference, the accuracy of the conversions can't be trusted, so the specifications in the datasheet have a little overhead.
  • Hi Tom,

    Sorry for the long delay to answer.
    Your reply answered my issue. Let‘s see if this applies to TUeV as well.
    If there are any questions popping up later I will open a new case.


    Best regards

    Robert
  • Hi Robert,

    Sounds like a plan! Do let me know if they give you any trouble.