Digital and Analog Ground rules for PCB Layout using ADS5485 family

Hi,

if you check with the schematics and layout of our EVM for the ADS5484, you would see that we use a single ground plane in the PCB and connect the digital and analog ground pins of the ADC to it.  So there are no adverse effects of using a single ground plane, if done correctly.  The User Guide for the ADs5484 EVM shows the ground plane used and also shows FFT plots of several configurations to demonstrate data-sheet performance on the EVM.

By saying 'if done correctly', i mean that in the layout of the analog input signals, the clock input, and the digital outputs that you would want to pay attention to ground plane return currents and isolation between the analog inputs and other things on the board that might be switching.  Since the analog inputs and clock input and LVDS outputs are all differential, return currents of these signal should not be much of an issue, and hopefully the pinout of the device influences the layout of the board to keep the digital outputs away from the analog inputs.

After that, make sure that there are not other unrelated single ended signals in the design that come near the analog input or sample clock, or that their return currents on the ground plane also don't come near the ground plane reference under the analog input or clock.

Regarding the issue of splitting ground planes or not splitting ground planes in the general case, i thought on of our guys Mark Fortunato said it best:

Quote:

I would add the following to the grounding issue.  I go through the following mental exercise when working on the layout of a high speed design like this (or, indeed, a high precision lower speed design).  Except at one point at the chip where the grounds are connected I “cut” the ground plane between analog and digital ground making sure all the analog pins are in the analog ground section and all the digital pins are in the digital ground section.  I then route all the traces without ever crossing the cut.  Sometimes this requires moving some other parts around.  Once this is done I remove the cuts.  The reason for the cuts is just to force the discipline of having all the analog traces stay on their side and all the digital traces stay on their side.  

 High speed ground currents will run on the ground plane under the traces that sourced the current (i.e. the path of least IMPEDANCE, not RESISTANCE).  This is due to the mutual inductances between the trace and ground.  Low speed signals will follow the straight line least- resistance path back.  At speeds in between the current will have a distribution of paths between the two.  What is “high speed” and “low speed” are determined by the geometry and dielectric constants of the materials being used and Maxwell’s equations.  

 If components are properly placed to make it easier to route al the digital traces away in one direction and all the analog traces in the other direction then the currents will never cross or share any common section of the ground plane.  You really do not need to know what is high speed and what is low speed to get this right.  Just keep in mind the generalities that the current will be distributed between the straight line path of least resistance and the under-the-trace path of least impedance and make sure these return paths for the analog signals run away form the chip in one direction (on one side of the cuts) and the return paths for the digital signals run away from the chip in the other direction (on the other side of the cuts).  If this is done right, no current will “want” to cross the cuts and, therefore, the cuts serve no purpose and can be removed, or rather filled in with metal for a solid ground plane.

 Once you get good at this thought process there is no need to lay in the temporary cuts.  You just place your components and run your traces thinking about what the round trip path is for the currents keeping digital away form analog and it all takes care of itself.

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Regards,

Richard P