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ADS8363: ADS8363 first value pegged high

Part Number: ADS8363

Hi,

I am taking 2048 samples from a ADS8363 using SPI at a frequency of 10Mhz.  When I take the first reading the first value of the 2048 samples is always pegged high, the rest of the values are normal.  If I take another reading with the ADS already powered up it works fine.. Its only on the initial reading.  As far as I can confirm all of the warm up times are satisfied.  

Any ideas on where I should start?

Thanks

Mike

  • Hi Mike,

    Are you using the device in Half-Clock Mode or Full-Clock Mode?

    When the device is using Half-Clock Mode, there is a latency of  (1)  frame to read the conversion results, in other words, the current frame is providing data of conversion (n-1). On this mode of operation, the data of conversion (n-1) is provided while the ADC is executing  conversion (n). Therefore, when using Half-Clock Mode, when the device just have been powered up, the first conversion data frame is invalid since you are reading conversion (n-1).

    The Full-Clock Mode provides data without latency; i.e., the device provides the conversion results right after the conversion is completed, during the acquisition phase (tacq) of the next conversion. Please see below the timing diagram for Half Clock Mode.

    Please let me know if you have questions.

    Thank you,

    Best Regards,

    Luis

  • Hi Luis,

    Thank you so much for the reply.  Yes that was the issue, we are running Half-Clock so I ended up throwing out the first sample.  I have attached a picture of the read with 2048 samples.  It seems during the read the A/D pegs low as seen in the attached pic.  Any ideas on what would be causing this?

    Thanks again

    Mike

  • HI Mike,

    Is it possible to obtain a few oscilloscope plots for CS, BUSY, CLOCK, CONVST, SDO both when reading good results and when the device provides only zeroes for conversion results? This will allow us to verify the timing. Please place the probes right at the pins of the device.

    If you have a schematic available, we could review as well.

    Many Thanks,
    Kind Regards,
    Luis
  • Hi Luis,

    I attached a picture of it happening again reading an accelerometer at 100khz.  Allows us to see the issue a little more clearly.  I am also attaching the schematic of the A/D.  I will work on those Oscilloscope pics. 

  • Hi Mike,

    Please let me know if the issue persists.

    If you still having issues, if possible, please provide oscilloscope plots so we can review the interface timing.

    Many Thanks,
    Luis