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Hi,
I am using DAC37J84 in my design. What is the termination circuit to be used to provide LVPECL Clock and Sysref input to the DAC? I am planning to provide ac coupled LVPECL.
Can the device take LVDS Clock and Sysref inputs?
If yes, which one gives better performance?
Clock frequency: 1GHz
Kiran,
It is recommended to use LVPECL for both. LVDS does not guarantee a large enough differential swing for the clock input. Please see section 7 of the attached document for more information regarding this. You can also use the DAC38J82EVM schematic for an example on how to provide termination. This EVM uses DC coupling for the SYSREF.
Regards,
Jim
1643.DAC3xJ8x Device Initialization and SYSREF Configuration.pdf