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Linux/ADS54J66EVM: Unable to communicate with LMK04828 over SPI via FMC

Part Number: ADS54J66EVM
Other Parts Discussed in Thread: LMK04828, , ADS54J66

Tool/software: Linux

Hello,

I am having trouble accessing LMK04828 on ADS54J66EVM over SPI from Linux.

The board is connected over FMC on a ZCU102 Xilinx board. The SPI FMC pins are routed to Xilinx SPI controller. ADS54J66 is connected as SS 0 and LMK04828 as SS1.

I am able to successfully read and write ADS54J6T6 registers, however I can't seem to be able to write LMK04828.

I understand that the LMK04828 is configured as 3 wire SPI by default so I won't be able to read until I change the configuration to 4 wire SPI. (I may also need to add a 0-ohm resistor to R113 on the EVM board?) But before reading, I am trying to verify whether I can even write. Any attempts of register writes don't seem to be reflected if I switch to USB mode and read the registers using the ADS54Jxx GUI. 

Any help will be appreciated.

Thanks,

Lenny

  • Hi Leonid
    Can you probe the LMK04828 SPI bus pins to compare the format and timing created by the ZCU102 FPGA to that using the USB to SPI interface on the ADS54J66EVM?
    I have notified a colleague of this post. He will follow up with additional guidance by end of day on Monday.
    Best regards,
    Jim B
  • Leonid,

    To use 4 wire mode, you will have to add R113 and write a 0x33 to address 0x14A in the LMK to use the RESET pin as a data out pin. Are you controlling the FMC_DIR_Control signal the same way the USB interface is? The CPLD code is attached for reference if needed.

    Regards,

    Jim

    ADS54J40EVM CPLD Code.zip

  • Hi Jim,

    I am not controlling FMC_DIR_Control. I see it on the schematic but cannot find any documentation as to what it does. I've been able to write and read ADS54J66's registers over SPI without FMC_DIR_Control. Do I need to control it in order to talk to the LMK?

    Thanks,

    Lenny

  • Lenny,

    Looking at the CPLD code, this signal needs to be low to allow writes to the LMK. Did you get the CPLD code from the last post I sent? The file called ADC3xxx_CPLD.v will provide all of the documentation you will need regarding this interface.

    Regards,

    Jim 

  • Hi Jim,

    thanks for your help. I've been able to take a look at the CPLD code and can now both write to the LMK and read from it using the 4 wire mode. 

    One note, I had drive FMC_DIR_CONTROL signal high to allow writes to the LMK.

    Lenny