ADS1248: ADS1248 data value error

Dear Joseph Wu,

Attach the circuit diagram.

We use PT100, connect PT100 according to Ch if necessary and disconnect. However,

if PT100 connected to AIN0 is disconnected, error of output data occurs.

If you disconnect another input port, there is no problem.

I wonder if AIN0 has to be connected unconditionally for the input port.

* Circuit Control Concept

Dear Joseph Wu,

ADS1248 Preferences
> GAIN: 4 times
> DATA RATE: 20
> IDAC1: 1mA (output to the same channel as analog input AIN0-> AIN2-> AIN4-> AIN6)
> IDAC2: 1mA ((Outputs to the same channel as analog input AIN1-> AIN3-> AIN5-> AIN7)

The test results obtained are as follows.

Schematic

Chun,

First, when the CH0 RTD is removed, CH0 reading may be unexpected. The problem is that the reference voltage drops to 0 and the ADC may have difficulty reading that condition (the reference voltage should be greater than 0.5V for operation). To make a proper measurement, you would need to use the system monitor to check the reference voltage or use the internal reference to check the input.

As for the other results, I'm still not sure what the problem is. I would first check the actual voltages across the test resistors and the reference resistor (measure them with a multimeter). Make sure that when the CH0 test resistor is removed, the voltages are correct.

Looking at the data I did compile some numbers with the measurement:

The first two columns indicate the channel and the test resistance. The third column shows the expected output based on ideal numbers, while the fourth column are the data. The fifth column is the equivalent voltage across the test resistance based on a reference of 1.64V. All these numbers are correct.

The last three columns involve the abnormal measurements. The 6th column is data with the CH0 test resistor removed and 7th is the equivalent voltage assuming the reference voltage of 1.64V. Check these values against the multimeter measurements. If these numbers are wrong, then you may need to debug the circuit to find where the current is going.

Note that the last column labeled as "Offset" is a subtraction of the abnormal read from the ADC read when the circuit is working. It looks like all data are off by about 2009Axh. It looks as if there is a constant offset error. This probably means that either the offset calibration register is set to a wrong value, or there is current offset that in the measurement.

Joseph Wu

Chun,

Instead of an offset, another possible cause of this issue would be hardware compensation.

I'd forgotten that that I had mentioned a set of 110Ω resistors used for hardware compensation. While you don't have them shown on the most recent schematic, they were shown in your first posting. This hardware compensation might be the cause of this offset and create the offset 2009Axh for the measurement. They might in the circuit as shown:

These four 110Ω resistors are the equivalent of this shown in your first post:

Let's take CH0 as an example. Without this 110Ω resistor, the ADC measurement is:

Output code = PT100 * 1mA * 4 * 2^23 / (2mA * 820)

However, when the resistors are there, the equivalent measurement is this:

Output code = [(PT100*1mA) - (110Ω*1mA)] * 4 * 2^23 / (2mA * 820)

Assuming the PT100 is really 100Ω, the final result would be:

Output code = (10Ω*1mA) * 4 * 2^23 / (2mA * 820) = 204600d = 31F38h

This number is a bit off from what I would have guessed. If the circuit does have these resistors, they may be the equivalent of something like 102.6Ω. Regardless, this is another thing to check. It's possible the circuit is different than described. Ask the customers about the 110Ω resistors and how they have the measurement set up.There may be some differences in gain setting, so have them be detailed in their description.

Joseph Wu

Dear Joseph Wu,

There is no 100 ohms in the final circuit.

The data measured is also the result of the final circuit.

Voltage value measured by Ch

Ref Voltage : 1.64V (R57_820Ohm Measured value at both ends)

SW Configuration

1--> 1. Reference 0 setting  2. Current output setting  3. Channel Settings  4. Calibration  5. Start RDATAC

This problem is caused by the above settings.

2--> 1. Current output setting  2. Channel Settings  3. Start RDATAC

If you configure the above settings, it will work normally. However, we can not use it like 2 for each channel.

It takes a long time.

Can AIN0 / 1 be set as the reference channel and cause trouble?

Thanks.

Chun,

I'm sorry I didn't respond to your post at the end of last week.

Looking at the data I have more questions about the test. In the abnormal readings is the RTD at CH0 removed? or is the RTD set to 0Ω? I thought that this was for the RTD removed, but it looks more like 0Ω.

In your last post, the data shows 0mV when the CH0 resistor is deleted. If the resistor is removed, the REF voltage should be 0.82V instead of 1.64V. Additionally, they should check the voltage from leads 1 and 3 of the RTD at CH0. Lead 1 should be pulled up by the disconnected IDAC, so it should be near the positive supply (maybe near 4.9V). Lead 3 should still be connected to the top of the reference resistor (0.82V) and lead 2 should be floating. If the CH0 resistor is a 0Ω resistor, then the voltage across it would be 0V and the reference would be 1.64V. With a CH0 abnormal measurement, is the reference resistor 0.82V or 1.64V?

However, even in the abnormal data from the previous posts, it looks like the output voltage is giving a value of FF1893h. This would still be something reasonable if the 100Ω is still there and the offset that I mentioned is there.

Because the offset value always appears to be ~2009Ax, I think when the customer gets an abnormal reading, they should immediately read the offset calibration register (OFC). This looks like the error they have gotten. I mentioned this in the last post, but it almost looks like they ran a SYSOCAL (60h) but should have run a SELFOCAL (62h) for the calibration. The exact calibration isn't shown in the code that you posted, and it may be important. If they used the wrong calibration, this might be the error. If this is the case, then the value in the offset calibration register is very large and wrong. If they get the abnormal reading, it is important to know what value they have in the OFC.

I didn't understand your last question: "Can AIN0/1 be set as the reference channel and cause trouble?" The ADS1248 only has REFP0/REFN0 and REFP1/REFN1 as the reference inputs. I'm sure how else AIN0/1 can be a reference channel. Can you explain what you mean about this question?

Joseph Wu

Dear Joseph Wu,

1. The question "Can I set the AIN0 / 1 as a reference channel to cause a problem?" Is the wrong question.

2. SELFCAL is running.

    If you see the code above, run SELFOCAL before reading the data.

==================================================================================

    ADS1248SetStart (1);

   ADS1248SetReset (1);

   ADS1248SetVoltageReference (0x00); // set_vref ('0'); // ref w0

   ADS1248SetDataRate (0x02); // data rate 20

   ADS1248SetGPIOConfig (0x00);

     ADS1248SetGPIODir (0xff); // set_gio ('f', 'f'); // gpio // uff

   // set_burnout ('0'); // N0

   ADS1248SetBias (0b00000000); // set_bias ('A', 'A'); // OAA // VCC BISE 2B 10101010

   ADS1248SetSystemMonitor (0x00); // nermal mode // M0

   // ADS1248SetBias (0x00); // set_bias ('A', 'A'); // OAA // VCC BISE 2B 10101010

   ADS1248SetIntRef (0x01); // set_iref ('0'); // E1 // sleclect ref off

   ADS1248SetCurrentDACOutput (0x06); // set_current ('6'); // I0 // current source on 1mA

   ADS1248SetIDACRouting (0,0); // set_idac ('f', 0); // x0 // current select 0 off

   ADS1248SetIDACRouting (1,1); // set_idac ('f', 1); // y0 // current select 1 off

   ADS1248SetChannel (0,0); // set_ch ('0', 0);

   ADS1248SetChannel (1,1); // set_ch ('1', 1);

    ADS1248SetGain (0x02); // gain 4 // p4

   ADS1248SendSELFOCAL ();

   ADS1248SendRDATAC ();

}

=============================================================================

3. No offset is set.

4. The RTD of Ch0 is the opened data.

    We did a test by attaching resistors on a channel-by-channel basis instead of RTDs for testing. Please see the photograph below.

4Ch connection

3Ch connection

Chun,

I think I know what is going on. I ran the customer's configuration sequence using ADCPro and the ADS1248EVM. The problem is during the offset calibration when there is no CH0 resistor.

Calibration works by shorting the inputs together to get a measure of the offset voltage. This measurement is stored and subtracted from future measurements to remove any offset. However, the device needs to be operating normally when the calibration is run. Here is how I have the test set up:

Using the EVM, I set the device up with the test resistors.

The test resistors are set up similar to what your customer has.  I use 100Ω, 150Ω, 200Ω, 249Ω, and a reference resistor of 825Ω. Here's a close up of the test resistors:

I run through the whole setup, set the inputs, and IDAC configuration, and then run the self offset calibration:

The resulting SELFOCAL looks correct, the value is near 0 (but negative in this case).

Then I start over. First, I remove the CH0 resistor. Then, I shut down the software, unplug the EVM, and then restart the entire setup. Here's a picture of the EVM with the CH0 resistor removed.

I run through the same setup, but the problem is found in the calibration. Here is the result

The problem is that the device is no longer working properly when the offset calibration is run. The inputs are still shorted and the offset voltage is compared to the reference as a measurement. However, with the CH0 resistor missing, none of the IDAC currents make it to the reference resistor. Therefore the reference voltage is 0. This gives an offset result that is completely wrong. Here the result is 6E38ED, but it could be anything. If lead 1 of the reference resistor were broken, then the only one of the IDAC currents reach the reference resistor. The resulting reference would be 0.82V. This would still be wrong. During calibration, the offset would be measured with a 0.82V reference, when normally it would be 1.64V. The offset would appear twice as large if the reference was only have as big. The board should be working normally when running the calibration.

To make sure that the device is operating properly and that the IDAC currents reach the reference resistor, the customer can use the system monitor. Have the ADC use the internal reference and measure the reference voltage. If the reference is near the expected value, then the offset calibration can be run, if the reference is not near the expected value, change the channel until if finds that the reference is an expected value. Then run the self offset calibration.

Joseph Wu