• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 46 subscribers
  • Views 650 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DAC38J84: NCO testing configuration

JDY
Prodigy 175 points
Part Number: DAC38J84
Other Parts Discussed in Thread: LMK04828

Hi all,

I have configed  my DAC38J84 through Microblaze into the NCO testing mode to check if the SPI is working and the clock and power are good. Here is my configuration of regs:

0x2F0001,
0x302000,
0x022050,

0x1BC100,

0x1A0020,
0x317808,
0x320360,
0x33AF70,
0x3B0000,
0x3C9050,
0x3D00B6,
0x3E0148,

0x143333,
0x153333,
0x163333,
0x173333,
0x183333,
0x193333,
0x120000,
0x130000,
0x1F1140,
0x1F1142,
0x1F1140,
0x03F301

ls there anybody can help me verify this configuration? And DAC CLK= 250MHz. Thanks.

  • 0
    TI__Guru* 91947 points

    250M_Fs_50M_NCO_only.cfgJDY,

    The attached file has the register settings to get a 50MHz NCO output tone with a 250MHz input clock.

    Regards,

    Jim

  • 0 in reply to jim s
    Prodigy 175 points

    0042.DAC_regs_configuration.docxhi Jim,

    Thanks for your help sincerely, it works!! My chip DAC38J84 is not damaged, there is a 50MHz NCO signal output !

    But now,I have be configuring the registers of the chip DAC38J84 to adapt to my project. The pins DACCLKP and DACCLKN of the chip are connected to the device clock output pin of LMK04828, and it's configed as 250MHz. The DAC clock is 250MHz, and the line rate of JESD block is 2.5Gbps. The ouput frenquency of the SERDES PLL is 2.5Gbps. And the LMFS is 8411 mode. And there is no interpolation in my design. What's more, I don't use the mixer block, QMC block and the Fractional Delay function.The output of the DAC is directly sourced from the data of JESD block received from the FPGA.
    I have configed my chip but there is nothing output. Attached is my configuration. I have configed the regs of this chip for a long time since last November. l am so exhausted on it. The chip is so hard to config correctly. And l am afraid that my boss will have few patience on me anymore soon. So can you help me verify my configuration or give me a correct configuration version. If possible, can you please give me a full correct configuration of the regs for my design. Too many thanks.