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ADS127L01EVM: Issues changing the clock speed with Delta Sigma EvaluaTIon Software and other questions

Eric Jackson
Prodigy 20 points
Part Number: ADS127L01EVM
Other Parts Discussed in Thread: ADS127L01, , ADS1274

we're having some problems with changing the clock speed for the ADS127L01 evaluation board. Changing the clock speed in the software should change the sampling rate, however the trace outputted on the screen does not change. The outputted sin wave trace looks identical whether we sample at 100000 Hz or 17600000 Hz.
When we output the trace to a text file it shows the correct data rate (550000 Hz for 17600000 Hz clk speed, 3125 Hz for 100000 Hz clk speed).

Also, the maximum amount of data points we can acquire is 64000. Is there any way to increase this value? We'd like to get a 10 second trace of a 100 KHz signal and this isn't nearly enough datapoints.

Is there a way to communicate with these boards outside of your software? The scripting inside of the software does not allow us to loop through multiple data collections easily.

Lastly, is there any way to collect/synchronize data from multiple boards on the same computer? the Delta Sigma software only shows 1 board connected. We purchased three ADS127L01EVM boards with the intent of collecting data from multiple 100 KHz sine waveforms synchronized in time.

  • 0
    TI__Guru 66246 points
    Hi Eric,

    Thanks for your post and welcome to our forum!

    How are you adjusting the CLK input frequency? On the EVM, JP6 can be used to select either 16 MHz, 8 MHz, or 4 MHz (HR, LP, or VLP Mode, respectively). If you are providing a clock signal from an external source, you can uninstall the shunt on JP6 and connect your signal generator output to JP6[1, 3, 5] (i.e. any header on the left side). The "Clock (Hz)" parameter in the Data Analysis window is only used to record the clock frequency that was used during the data collection. This clock frequency and the resulting data rate will be noted at the top of the text file when the data is saved.

    I understand that you wish to collect more than 10s of data, but, unfortunately, this is not possible with the EVM today. We are limited to 64k points due to the amount of memory on the TIVA microcontroller. You can connect to a separate microcontroller using the DEBUG header (J6) and installing JP1 to disable the on-board TIVA. Note that the DEBUG header comes before the level-translators, so DVDD should be set to the same logic level as your microcontroller.

    Neither the GUI nor the EVM hardware are currently able to support daisy-chained devices. The DAISYIN pin is shorted to the ground plane.

    Please keep in mind that the EVM is intended to be an evaluation tool to help you gain familiarity with the ADC features and performance. I have noted from past customers that many desire larger sample sizes, so we'll see if that can be improved. I also think supporting daisy-chained devices would also be a useful update to include, so I will make note about that as well.

    Thank you for the feedback. Please let me know if you have any further questions.


    Best Regards,
  • 0 in reply to Ryan Andrews
    Prodigy 20 points

    Hi Ryan,

    Thanks for the quick reply! It seems there was a bit of a misunderstanding, I thought that the clock parameter in the Data Analysis window changed the clock speed. Good to know its just for recording. If we were to use a function generator as an external source what amplitude signal would we need? Also, where would we connect the negative from the function generator? To any grounded test point (TP9 or TP22 for example)?

    Its unfortunate that the software and the hardware can't support more than one device connected at a time. I understand that it is an evaluation board though and not all of the features are there.

    It looks like these evaluation boards will not be suitable for our uses. The reason we got these boards is because they were 24 bit 512 KHz, and we planned on using them to collect data from two 100 KHz sine waves to demodulate a signal post-process. Since we can't collect data from more than one device at a time this won't work. Would you be able to recommend another ADC that could fit our uses? We need 24 bit, 512 KHz with at least two channels of data being collected at a time.

  • 0 in reply to Eric Jackson
    TI__Guru 66246 points
    Hi Eric,

    The external clock input should have a peak-to-peak amplitude equal to DVDD with a mid-supply offset. The ground of your function generator should be tied to any GND test point on the EVM.

    For 512 kHz data rate and above, we don't have any multi-channel, simultaneous sampling ADCs in our portfolio at the moment. The ADS1274/78 from the same family are 4- and 8-channel devices with simultaneous sampling up to 144 kSPS.

    As I mentioned earlier, I do think this was a feature we should have supported on the EVM. I hope that you can still evaluate the expected performance of the ADS127L01 with the EVM as it is and feel confident enough to create a custom two-channel design. We would be happy to provide reviews and feedback during the design process.

    Best Regards,