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ADS7830: Timing requirement of the Fall time of SCL/SDA signal

Part Number: ADS7830

Hello,

My customer has a question about ADS7830.

[Q]

Do they adapt the minimum specification of the fall time of SCL/SDA signnal (20+0.1Cb) ?

What kind of action expects it when they can not adapt it?

I know that it is listed in I2C-BUS specification.

However it is described in note as follows.

If mixed with Hs-mode devices, faster fall-times according to Table 6 are allowed.

Best Regards,

Hiroshi Katsunaga

  • Hello,

    Could you give me your answer ?

    Best Regards,
    Hiroshi Katsunaga
  • Katsunaga-san,

    Sorry for the delay in responding.

    The minimum spec for fall time in Fast mode in the I2C standard is derived from the RC time constant of the signal to rise/fall to the required logic level, based on the recommended values of the pull-up resistor and line capacitance.

    With the introduction of Hs-mode the SCL and SDA signals are actively driven to go faster and meet the higher throughputs of this new standard. But in order to maintain compatibility with the older standard, they included the footnote that when Fast-mode devices are “mixed with Hs-mode devices, faster fall-times according to Table 6 are allowed.” This does create a bit of a conflict within the I2C standard and if you look at the latest 6.0 version of the I2C spec, the 20+0.1Cb is not mentioned.

    Since the ADS7830 is designed for Fast and Hs-mode of operation, it will react to correctly, even when the min Fast mode spec of 20+0.1Cb is not met.

    Regards,

    Sandeep

  • Hi Sandeep-san,

    Thank you for your clear comments.
    I understood your all comments.

    Thank you for your cooperation.

    Best Regards,
    Hiroshi Katsunaga