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ADC08D1520: How to capture Data with the respective RB and communicate with a external processing FPGA

Benjamin Richter
Prodigy 30 points
Part Number: ADC08D1520


Hello everybody,

i am working on a solution for a DSP-System using the ADC08D1520 RB. I want to use this RB because i have it anyway from previous projects.

The project is about controlling trigger voltages (On and Off Signals) for a gate driver, dependent on the respective voltage slopes sampled in the previous cycle.

The Task:

I want to sample two voltages in the range of up to 16V/ns. After sampling the Data, it should be processed on a FPGA which then sends the modulated trigger Signals via an isolation to a DAC.

Because i am not really sure about the possibility to program the on board virtex 4 FPGA, i want to send the ADC captured data to another FPGA where i can do the processing using Matlab.

After that i need to interface an SPI-Isolator which leads to a DAC.

The Question:


The FMC-Connector seems to be the right part to interface a external FPGA. Is there a way to do it this way? I didn't find anything about interfacing other hardware using the FMC-Port.

Is it possible to accomplish the task using the respective Hardware? For that i attached a Schematic to this post.

Thanks in advance,

Best Regards,

Benni

  • 0
    TI__Mastermind 44680 points

    Hi Benni

    My understanding is the ADC08D1520RB has the pass-thru data to the FMC connector enabled by default. The FPGA generated signals on the FMC connector are very similar to those output by the ADC itself (for 1:2 demux mode), with the addition of 2 extra DCLK signals to ease data capture into the FPGA on the FMC Carrier Card. The DCLK outputs will be DDR (data transitions on both rising and falling edges of the output DCLKs).

    The pinout of the FMC connector is shown on sheet 5 of the schematics, which are included in the ADC0xD1520RB Design Package which is available in the ADC08D1520RB web folder in the Design Files section.

    I hope this is helpful.

    Best regards,

    Jim B

  • 0 in reply to Jim Brinkhurst1
    Prodigy 30 points

    Hello Jim,

    thank you very much for your fast and helpful reply. 

    I checked the Schematics and in my understanding, each single bit of the respective channel is sent to a pin on the FMC. I measured the output signals on the FMC-Pins during a generic waveform conversion and recognized that those should be LVDS Signals. By implementing a LVDS Interface on the following FPGA (Spartan 6) the interface should work fine. Do you think this is a suitable solution?

    Thank you very much,

    Best Regards,

    Benni

  • 0 in reply to Benjamin Richter
    TI__Mastermind 44680 points

    Hi Benni

    Yes, I think that should work.

    Note: Because the data and DCLK signals output by the FPGA may not be perfectly skew matched (skew higher than the ADC outputs themselves) you may need to implement adjustable capture delay on each data pair. The ADC test pattern mode should be helpful in implementing this procedure.

    Best regards,

    Jim B

  • 0 in reply to Jim Brinkhurst1
    Prodigy 30 points

    Hello Jim,

    i started creating a LVDS interface on the external FPGA.

    Now i am wondering why the Data-Output in the Single-Chip Data-Sheet contains 8 pairs of data lines, but the Reference-Board Schematic says that the output is composed by 12 Data-Lines?

    Thank you very much for your reply,

    Best Regards,

    Benni

  • 0 in reply to Benjamin Richter
    TI__Mastermind 44680 points

    Hi Benni

    I see what you mean. There are only 8 pairs of data per port from ADC to FPGA, but there are 12 pairs per port from FPGA to FMC connector.

    Looking at the FPGA code and comparing the schematic for the ADC08D1520RB with that of the ADC12D1800RFRB (used as the starting point for the 8-bit design) I believe the data to the FMC connector will be on the lower 8 pairs of each port. The upper 4 pairs should be ignored.

    Best regards,

    Jim B