Hey Guys
I am using TI's High speed ADC board ADS52J90EVM. I am using Xilinx Zynq Ultrascale+ board (zcu102) to read ADC samples using JESD204B interface.
To authenticate the working of ADC, i would like to test it first on HDL simulation.
Could you please provide any HDL (verilog,system verilog, vhdl etc ) model of the TI's ADC for JESD204B interface ?
Thanks alot for assistance
Rizwan
