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Original question:

ADC12DJ2700: Calibration Modes

ADC12DJ2700: Calibration Modes

Paul Rott
Prodigy 230 points
Part Number: ADC12DJ2700
Other Parts Discussed in Thread: ADC12DJ3200

Hi to all,

sorry to come back with a similar issue to the mentioned thread.

At the moment we'd like to check, if it is possible to use the Offset-Calibration of the ADC12DJ3200 to remove the external DC-Offsets in addition to the internal ADC-Offsets.
When the offset calibration runs, the input signal is switched off. We only have a unknown and undesired DC-Offset.

Jim wrote on the 23 Feb. 2018:
"If input signals are applied and have certain characteristics (signals at or near DC or aliased signals that will fall near DC) the offset calibration results will be degraded. For this reason we recommend that offset calibration only be enabled when the input signal is known or can be disconnected."

So does this mean, that the external DC-Offset degrade the Offset-Calibration and falsify the measurement performance of the ADC?
Or does this mean, that the ADC-results gets falsified only by the amount of the removed DC-content from the external signal?

If the ADC-results only gets falsified by the amount of the removed DC-content, it wouldn't be a problem for us, because the external DC-Offset is not requested.
Do you know which maximal external DC-Offset is allowed and can be calibrated by the ADC12DJ3200?

Thank you very much for your support.

Best regards

Paul Rott

  • 0
    TI__Mastermind 20541 points
    Hi Paul,

    We are looking at your question and will get back to you soon.

    Regards,
    Neeraj
  • 0 in reply to Neeraj Gill
    TI__Mastermind 44680 points

    Hi Paul

    If certain types of signals are applied during offset calibration the offset calibration results will be falsified by the amount of the removed DC-content caused by that applied signal.

    Once that signal is removed or changes to have difference frequency characteristics the resulting DC offset will be evident.

    The offset calibration process uses the user accessible offset adjustment register settings to add negative or positive offset to attempt to minimize the net ADC offset.

    The offset adjust registers are:

    OADJ_x_INy at addresses 0x08A through 0x095. The particular registers in use depend on the ADC operating mode, foreground or background calibration mode choice and input mux configuration. To confirm which ones are being adjusted you can power-up the ADC and read all of the initial register settings, then enable and run offset calibration and read the register values again to see which ones are updated.

    The approximate adjustment range is +/-28mV (see Analog Input Offset Adjust section of the datasheet) at the ADC differential input.

    I hope this is helpful.

    Best regards,

    Jim B