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ADS131E08: Estimating settling time

Part Number: ADS131E08

From figure 32 of the ADS131E08 datasheet I see that the time for this ADC to fully settle is 3 sample periods (i.e. 3 ms at 1kHz). How much will the ADC input settle in 1 or 2 sample periods if a step input occurs at the same time as a DRDY pulse?