ADS8556: How to avoid partial power down mode

Satoshi

Guru 19655 points

Part Number: ADS8556

Sometime the after CONVST_x set reset function (Low ⇒ High ⇒ Low), CONVST occur whisker and reaction BUSY pin.

When after above operation, ADS8556 is be partial power down mode and BUSY is always Low.

Please let me know about avoid partial power down mode below;

①Whisker width is 60ns, what is the minimum on time for change to partial power down mode?

　I will confirm for reduce whisker width.

　If there the other idea for avoid partial power down mode, please let me know.

②Can Hardware mode(external circuit) change to Auto-NAP mode?

③Please let me know about necessity or use case for partial power down mode.

　Is there reason the other than low power consumption?

④About power on reset(Datasheet page 31), I think that 1.5V trigger level is very low voltage.

　What is the reason for set 1.5V trigger level?

Best regards,

Satoshi

over 7 years ago

0 Satoshi over 7 years ago

Guru 19655 points

Any update on this?

I was cleared question ② and ③, please any advice about question ① and ④.

Best regards,
Satoshi

0 Cynthia over 7 years ago

TI__Mastermind 25030 points

Hello,
I apologize for the late response.

1. A falling edge of CONVSTx during an ongoing conversion puts the xADC pair in partial power-down mode. The CONVSTx signal must remain high during the entire conversion cycle. If this whisker is bring CONVST high, then it is initiating a new conversion and stopping it before the conversion is complete putting the ADC in power down mode.

4. The 1.5V threshold makes sure that the internal circuitry is at the needed power level for the power on reset to be effective and bring up the the device in a known state.

I am glad to hear you were able to solve the other questions, please let us know if you would like information on them
Regards
Cynthia

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ADS8556: How to avoid partial power down mode