I intend to use the ADS8691 with a throughput rate of 1000kSPS and now checking the requirements to the SPI. I’m confused regarding the serial clock frequency with a maximum of 66.67MHz. As I understand, data transfer time (Data Read Time) is right after conversion time tconv, initiated by pulling CONVST/ \CS low. Since ADC cycle time period is 1us, conversion time 665ns, there’s only 335ns left for data transfer!? During this time 32 bits shall be transferred with a serial clock SCLK of 66.67MHz? In my opinion there are 100MHz needed...