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My customer has asked the following:
We noticed in the datasheet that K is configurable through SPI. We would like to know what the range of this configuration parameter is. Can we set it to 0 and have only 1 frame per LMFC.
I am not sure on this, but the note in Register 31h seems to indicate that the lowest value is 8. Can you go into more detail concerning the K values and how they relate to the LMFS parameters of JESD204B.
Thanks for your help with this!
Richard Elmquist
Jim,
Thanks for your response. I will send it to the customer.
He also asked the following question:
If we use the ADC in subclass 0, does SYNC~ have to be synched to the system clock and respect the setup/hold time of the ADC input?
It is mentioned that in subclass 0 this signal is not timing critical so just wanted to confirm.
http://www.ti.com/lit/ml/slap161/slap161.pdf
Thanks for your help with this!
Richard Elmquist
Richard,
I have past this on to the design team but have not heard back from them yet.
Regards,
Jim
Richard,
SYNC~ does not have to be synched to the system clock and respect the setup/hold time of the ADC input.
Regards,
Jim