Hello Team,
I'm planning to supply 3.0V to AVDD and REF separately.
In that case, there is a possibility that "AVDD < Vref" may occur due to voltage variation of AVDD.
Is it acceptable? If it is acceptable, please tell me how far the voltage difference is possible.
As described in the datasheet, is "AVDD > Vref" mandatory?
By the way, AVSS is 0V.
Best regards,
Kato