DAC38RF82EVM: DAC38RF82 interface with TSW14J56EVM

Rajesh khanna

Intellectual 700 points

Part Number: DAC38RF82EVM
Other Parts Discussed in Thread: DAC38RF82

Hi,

I have with me TSW14J56EVM (PCB REV E) along with DAC38RF82EVM.

I have downloaded the HSDC PRO and DAC38RF8x EVM GUI installed.

Kindly please provide the steps to connect/test the DAC performance.

Regards,

Rajesh khanna.

over 7 years ago

0 Ebenezer Dwobeng over 7 years ago

TI__Genius 9695 points

Hi Rajesh,

Refer to this document: www.ti.com/.../slau671a.pdf

Thanks,
Eben.

0 Rajesh khanna over 7 years ago in reply to Ebenezer Dwobeng

Intellectual 700 points

Hi Eben,

Thanks for the help. It was very useful, as per the document i was able to check for on-board pll.

We are more interested in the below modes of operation.

We are not able to provide any other sample rate than 6144 with ref clk 384 MHz.

Can you please give procedure for testing these two modes of operation.

Regards,

Rajesh Khanna.

0 Ebenezer Dwobeng over 7 years ago in reply to Rajesh khanna

TI__Genius 9695 points

Hi Rajesh,

Attached are slides to walk you through setting up the DAC in your desired mode. The LMF = 823 mode requires 2 clock sources to setup successfully.

Thanks,

Eben.

DAC38RF82_real_811_8_bit_mode.pptx

DAC38RF82_82380_12_bit_single_real_2x.pptx

0 Rajesh khanna over 7 years ago in reply to Ebenezer Dwobeng

Intellectual 700 points

Hi,

sorry for the delay in reply.

I have followed as per the instructions in the DAC38RF82_82380_12_bit_single_real_2x.pptx

i am getting following output in the spectrum analyzer.

0 Rajesh khanna over 7 years ago in reply to Rajesh khanna

Intellectual 700 points

Please help me i have given the input as follows as per the documents.
1. 6.4 GHz (16 dBm) to J1
2. 600 Mhz (6 dBm) to J4.
3. JP10 Removed
4. External clock set in the GUI as 6400 Mhz.

0 Ebenezer Dwobeng over 7 years ago in reply to Rajesh khanna

TI__Genius 9695 points

Hi Rajesh,

Can you confirm if the two signal generators are locked to the same 10MHz reference? If they are not, ensure you connect the 10MHz reference output from one of the sig gens to the reference input of the other sig gen.

Thanks,
Eben.

0 Rajesh khanna over 7 years ago in reply to Ebenezer Dwobeng

Intellectual 700 points

Hi eben,

We have given the 10 MHz Reference. Still we face issue's. please find the screen shots for your reference. kindly help.

I have a doubt we have configured DAC Lane rate as 12 gbps. when we configure through hsdc pro, it says 16 gsps with 400 Mhz reference, please refer my previous screen. Is this correct for 3.2G data rate?

0 Ebenezer Dwobeng over 7 years ago in reply to Rajesh khanna

TI__Genius 9695 points

Hi Rajesh,

The first screenshot looks ok right?
If it is working intermittently, then this is a known issue having to do with the firmware in TSW14J56 for the 12bits mode only. It occurs when the start of frame is misaligned in the FPGA and DAC.

Regarding the serdes rate, HSDCPRO calculates this assuming a 16-bit converter so the reported value is not correct when using 12-bits mode. We will fix this in the next software release but it does not have any impact on the actual serdes rate.

Thanks,
Eben.

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DAC38RF82EVM: DAC38RF82 interface with TSW14J56EVM