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ADS131A02: Ref Buffer disable

Lutz Naumann
Expert 6610 points

Part Number: ADS131A02

Dear team,

when ADS131A02 is being used with an external VREF (e.g. REF5030 high grade is it possible to disable the internal VREF-Buffer? This buffer is loading the external REF when enabled and will impact the performance.

many thanks

Lutz

  • 0
    TI__Guru 67636 points
    Hi Lutz,

    Thanks for your post.

    The internal reference voltage can be disabled by setting the INTREF_EN bit in the A_SYS_CFG register to 0. However, the same buffer is used to present a high input impedance to the external reference source.

    Are you saying that you've tried this and you see poor performance with the external reference? Can you give us an idea of the performance you're seeing or the current drawn into the REFEXT pin?


    Best Regards,
  • 0 in reply to Ryan Andrews
    TI__Expert 6610 points

    Hi Ryan,

    we have not tested yet but are planning to use a very low drift (below 2ppm/°C) and very low noise REF and can not judge the impact the buffer. I'm afraid it will add additional drift and noise. Do we have an analysis regarding this? The REF voltage would be 3.00V

    thanks

    Lutz

  • 0 in reply to Lutz Naumann
    TI__Guru 67636 points

    Hi Lutz,

    The reference buffer has a typical offset of 250 uV with an offset drift of 4 uV/C typical and 7 uV/C max (1.638 ppm/C and 2.867 ppm/C, respectively). I don't have any data for the reference buffer noise, but I will see what our characterization team may have.

    Best Regards,

  • 0 in reply to Ryan Andrews
    TI__Guru 67636 points
    Hi Lutz,

    Just wanted to follow up on this. I still don't have a definitive answer on the reference buffer noise in the ADS131A02, but maybe we can better understand whether it is significant for your customer's application. The answer to that question depends on the data rate and the percentage of the full-scale range your customer expects to use.

    In general, reference noise dominates the ADC output noise as the input reaches closer to full-scale. The ADC noise spec in the datasheet is characterized with an input-short condition (i.e. 0-V differential), such that reference noise contribution is below the ADC noise floor. As you increase the percentage of full-scale utilization, the contribution of reference noise also increases. For low data rates, the effect of reference noise may not be apparent until near full-scale, while high data rates may show the effect sooner.


    Best Regards,