Hello,
I think Analog data captured -> LVDS lane output is 4.5 clocks in low-latency mode. Is my understanding correct? I would like to confirm this because low latency is important.
Best regards,
Toshihiro Watanabe
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Hello,
I think Analog data captured -> LVDS lane output is 4.5 clocks in low-latency mode. Is my understanding correct? I would like to confirm this because low latency is important.
Best regards,
Toshihiro Watanabe
Hi Watanabe-san,
Yes your understanding is correct.