Hi Team,
My customer is running into an issue with the single conversion mode on the ADS1112 taking longer than 3x the sampling period:
Our firmware team is using the device in single-conversion mode, setting the ST/DRDY bit to 1, and then waiting 3x as long as the sample period before reading the conversion result. As a check to ensure that the sample occurred, they are reading the ST/DRDY bit to ensure it’s been reset to 0. This works well most of the time, but occasionally and inconsistently that bit does not change back to zero. Two questions:
1. Are we using this bit as intended?
2. Are you aware of this or any similar issues with this part? Solutions?
Appreciate your thoughts and feedback.
Regards,
~John