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AFE4300: AFE4300

basel massad
Prodigy 20 points
Part Number: AFE4300
Hi
We are using the AFE4300 in IQ mode, we are having a problem with the results we get and we will explain what we did to setup the device:
First of we are using 2 calibration resistors (500 and 100 ohms) the magnitude calibration is done properly with no issues, as for the phase we are taking the results of the I and Q of the 500 Ohms resistor, the reference phase we get is about 33.22.
This is a sample code of the state machine we are using :
 
case 0:    // Board_ANALOG_ENABLE
        spi_init_state = 1;
        PIN_setOutputValue(periHandle, PIN_ID(Board_ANALOG_ENABLE), 1);
        Util_rescheduleClock(&sMClock,100);
        Util_startClock(&sMClock);
        break;
    case 1: // reset pulse
        Util_stopClock(&sMClock);
        spi_init_state = 2;
        PIN_setOutputValue(periHandle, PIN_ID(Board_Sensor_Reset), 1);//basel
        Util_rescheduleClock(&sMClock,1500);
        Util_startClock(&sMClock);
        break;
    case 2: // reset pulse
        Util_stopClock(&sMClock);
        spi_init_state = 3;
        PIN_setOutputValue(periHandle, PIN_ID(Board_Sensor_Reset), 0);//basel
        Util_rescheduleClock(&sMClock,2);
        Util_startClock(&sMClock);
        break;
    case 3:  // reset pulse
        Util_stopClock(&sMClock);
        spi_init_state = 4;
        PIN_setOutputValue(periHandle, PIN_ID(Board_Sensor_Reset), 1);//basel
        Util_rescheduleClock(&sMClock,5);
        Util_startClock(&sMClock);
        break;
    case 4: //open SPI driver and start PWM clock that feeds in the 1MHz clock for the AFE4300
 
        Util_stopClock(&sMClock);
        spi_init_state = 14;
        //set the regs adata in buffer
        index = 0;
        txbufInitAFE[index++] = BCM_CON_BCM_DAC_FREQ_ADD | WRITE;
        txbufInitAFE[index++] = (0x0000 >> 8);
        txbufInitAFE[index++] = (0x0000 & 0x00FF);
 
           //Device Control Reg 2 reset
        txbufInitAFE[index++] = DEVICE_CONTROL2_ADD | WRITE;
        txbufInitAFE[index++] = (0x0000 >> 8);
        txbufInitAFE[index++] = (0x0000 & 0x00FF) ;
 
        //set frequenccyf
        txbufInitAFE[index++] = BCM_CON_BCM_DAC_FREQ_ADD | WRITE;
        txbufInitAFE[index++] = (FREQ_64_DAC >> 8);
        txbufInitAFE[index++] = (FREQ_64_DAC & 0x00FF);
 
           //Device Control Reg 2
        txbufInitAFE[index++] = DEVICE_CONTROL2_ADD | WRITE;
        txbufInitAFE[index++] = (IQ_64_DEMOD_CLOCK >> 8);
        txbufInitAFE[index++] = (IQ_64_DEMOD_CLOCK & 0x00FF) ;
 
        AFESPI_open(peri_spiBufRCVDHandler);
        AFEClock_Start();
        Util_rescheduleClock(&sMClock,20);
        Util_startClock(&sMClock);
        break;
    case 14:
        Util_stopClock(&sMClock);
        spi_init_state = 5;
        firstTimeGPTInt = false;
        regIndex = 0;
        GPTimerCC26XX_enableInterrupt(shandle, GPT_INT_CAPTURE);
        Util_rescheduleClock(&sMClock,2);
        Util_startClock(&sMClock);
        break;
    case 5:
        Util_stopClock(&sMClock);
       // spi_init_state = 6;
        initAFE4300Chip();
        afeWorking = true;
        dataCount = 0;
        DataReady = false;
        Util_rescheduleClock(&sMClock,20);
        Util_startClock(&sMClock);
        break;
    case 6:
        Util_stopClock(&sMClock);
        spi_init_state =15;
        spiAcqTransaction.rxBuf =&Xc_Result[0];
        RXCal = true;
        writeToRegister(0x10, XC_DATA_ACQ);
        Util_rescheduleClock(&sMClock,1000);
        Util_startClock(&sMClock);
        break;
    case 30:
        Util_stopClock(&sMClock);
        startReadyinterrupt = false;
        setDefaultElectrodesInput();
        Util_rescheduleClock(&sMClock,1000);
        Util_startClock(&sMClock);
        break;
    case 15:
        Util_stopClock(&sMClock);
        spi_init_state = 20;
       xcSum = 0;
        xcCount = 0;
        rSum = 0;
        rCount = 0;
        printCounter = 0;
        startReadyinterrupt = true;
        Util_rescheduleClock(&sMClock,2);
        Util_startClock(&sMClock);
        break;
    case 7:                        //We get here only when a ready interrupt happens
        Util_stopClock(&sMClock);
        spi_init_state = 20;               //exit SM, will get back after the transaction is complete to state 8 or 9
        DataReady = true;
        readDataTransaction();             //read the ready data through spi transaction
        Util_rescheduleClock(&sMClock,2);
        Util_startClock(&sMClock);
        break;
 
The Dac freq and the device control2 registers are written right when we get an interrupt on the one of the internal clock positive edge, it’s as close as we can get to a synchronized spi/device clks then we write the rest of the registers and start the continues mode.

The results we are on sampled networks of resistor||capacitor are not 100% consistent, there is some increase and decrease with time of the actual results, and when tested on the body the whole thing goes haywire, we get a phase equal to 12 for example the first try then 11 then 8 and it keeps falling with then increasing with no apparent pattern.
Thanks 
Basel
Hi
We are using the AFE4300 in IQ mode, we are having a problem with the results we get and we will explain what we did to setup the device:
First of we are using 2 calibration resistors (500 and 100 ohms) the magnitude calibration is done properly with no issues, as for the phase we are taking the results of the I and Q of the 500 Ohms resistor, the reference phase we get is about 33.22.
This is a sample code of the state machine we are using :
 
case 0:    // Board_ANALOG_ENABLE
        spi_init_state = 1;
        PIN_setOutputValue(periHandle, PIN_ID(Board_ANALOG_ENABLE), 1);
        Util_rescheduleClock(&sMClock,100);
        Util_startClock(&sMClock);
        break;
    case 1: // reset pulse
        Util_stopClock(&sMClock);
        spi_init_state = 2;
        PIN_setOutputValue(periHandle, PIN_ID(Board_Sensor_Reset), 1);//basel
        Util_rescheduleClock(&sMClock,1500);
        Util_startClock(&sMClock);
        break;
    case 2: // reset pulse
        Util_stopClock(&sMClock);
        spi_init_state = 3;
        PIN_setOutputValue(periHandle, PIN_ID(Board_Sensor_Reset), 0);//basel
        Util_rescheduleClock(&sMClock,2);
        Util_startClock(&sMClock);
        break;
    case 3:  // reset pulse
        Util_stopClock(&sMClock);
        spi_init_state = 4;
        PIN_setOutputValue(periHandle, PIN_ID(Board_Sensor_Reset), 1);//basel
        Util_rescheduleClock(&sMClock,5);
        Util_startClock(&sMClock);
        break;
    case 4: //open SPI driver and start PWM clock that feeds in the 1MHz clock for the AFE4300
 
        Util_stopClock(&sMClock);
        spi_init_state = 14;
        //set the regs adata in buffer
        index = 0;
        txbufInitAFE[index++] = BCM_CON_BCM_DAC_FREQ_ADD | WRITE;
        txbufInitAFE[index++] = (0x0000 >> 8);
        txbufInitAFE[index++] = (0x0000 & 0x00FF);
 
           //Device Control Reg 2 reset
        txbufInitAFE[index++] = DEVICE_CONTROL2_ADD | WRITE;
        txbufInitAFE[index++] = (0x0000 >> 8);
        txbufInitAFE[index++] = (0x0000 & 0x00FF) ;
 
        //set frequenccyf
        txbufInitAFE[index++] = BCM_CON_BCM_DAC_FREQ_ADD | WRITE;
        txbufInitAFE[index++] = (FREQ_64_DAC >> 8);
        txbufInitAFE[index++] = (FREQ_64_DAC & 0x00FF);
 
           //Device Control Reg 2
        txbufInitAFE[index++] = DEVICE_CONTROL2_ADD | WRITE;
        txbufInitAFE[index++] = (IQ_64_DEMOD_CLOCK >> 8);
        txbufInitAFE[index++] = (IQ_64_DEMOD_CLOCK & 0x00FF) ;
 
        AFESPI_open(peri_spiBufRCVDHandler);
        AFEClock_Start();
        Util_rescheduleClock(&sMClock,20);
        Util_startClock(&sMClock);
        break;
    case 14:
        Util_stopClock(&sMClock);
        spi_init_state = 5;
        firstTimeGPTInt = false;
        regIndex = 0;
        GPTimerCC26XX_enableInterrupt(shandle, GPT_INT_CAPTURE);
        Util_rescheduleClock(&sMClock,2);
        Util_startClock(&sMClock);
        break;
    case 5:
        Util_stopClock(&sMClock);
       // spi_init_state = 6;
        initAFE4300Chip();
        afeWorking = true;
        dataCount = 0;
        DataReady = false;
        Util_rescheduleClock(&sMClock,20);
        Util_startClock(&sMClock);
        break;
    case 6:
        Util_stopClock(&sMClock);
        spi_init_state =15;
        spiAcqTransaction.rxBuf =&Xc_Result[0];
        RXCal = true;
        writeToRegister(0x10, XC_DATA_ACQ);
        Util_rescheduleClock(&sMClock,1000);
        Util_startClock(&sMClock);
        break;
    case 30:
        Util_stopClock(&sMClock);
        startReadyinterrupt = false;
        setDefaultElectrodesInput();
        Util_rescheduleClock(&sMClock,1000);
        Util_startClock(&sMClock);
        break;
    case 15:
        Util_stopClock(&sMClock);
        spi_init_state = 20;
       xcSum = 0;
        xcCount = 0;
        rSum = 0;
        rCount = 0;
        printCounter = 0;
        startReadyinterrupt = true;
        Util_rescheduleClock(&sMClock,2);
        Util_startClock(&sMClock);
        break;
    case 7:                        //We get here only when a ready interrupt happens
        Util_stopClock(&sMClock);
        spi_init_state = 20;               //exit SM, will get back after the transaction is complete to state 8 or 9
        DataReady = true;
        readDataTransaction();             //read the ready data through spi transaction
        Util_rescheduleClock(&sMClock,2);
        Util_startClock(&sMClock);
        break;
 
The Dac freq and the device control2 registers are written right when we get an interrupt on the one of the internal clock positive edge, it’s as close as we can get to a synchronized spi/device clks then we write the rest of the registers and start the continues mode.
The results we are on sampled networks of resistor||capacitor are not 100% consistent, there is some increase and decrease with time of the actual results, and when tested on the body the whole thing goes haywire, we get a phase equal to 12 for example the first try then 11 then 8 and it keeps falling with then increasing with no apparent pattern.

  • 0
    TI__Genius 12575 points
    Hi Besel,

    Did you get the same phase for other reference resistor (100 Ohms)?
    If you get same phase even for the other resistor then this could be due to some parasitics on your borad and you can compensate it from the actual measurement.
    Just to make sure if everything is proper I would suggest to measure an unknown resistor and get the consistent result before doing with the real body.

    Regards,
    Prabin
  • 0 in reply to Prabin Yadav
    Prodigy 20 points

    Hi Prabin,

    The phase of the other resistor is a little different, for the 500 Ohm resistor we got ~ -33.39 and for the 100 Ohm we got ~ -34.84 

    Measurements for an external resistor of 420 Ohm we get a phase get these results :

    -32.678

    -32.65

    -32.673

    -32.664

    -32.667

    and i think its safe to say that the the results are consistent.

    the problem occurs when we use a parallel RC network, the results are as follows :

    R = 359 Ohm,  C = 1190 pF

    time  pahse Rx phase  phase after calibration
    12:21 -23.7154 -33.3507 9.635321728
    12:30 -23.8027 -33.3601 9.557403596
    12:38 -23.8248 -33.3529 9.528103844
    12:40 -23.8408 -33.3317 9.490876582
    12:43 -23.847 -33.3482 9.501255583
    12:46 -23.8629 -33.3388 9.475883598
    12:48 -23.8408 -33.3317 9.490876582
    12:52 -23.8629 -33.3435 9.480586925
    1:39 -23.7264 -33.3364 9.60993759
    1:43 -23.6932 -33.3578 9.664646349
    1:44 -23.8027 -33.3364 9.533694044
    1:46 -23.89 -33.3529 9.462961393
    1:49 -23.8519 -33.3364 9.484507334
    1:51 -23.858 -33.346 9.487927387
    1:53 -23.8629 -33.3317 9.468734335
    1:56 -23.901 -33.3341 9.433079518
    2:07 -23.9883 -33.3435 9.355239349
    2:14 -23.9993 -33.3364 9.337035104
    2:16 -23.6883 -33.3364 9.648066429
    2:20 -23.5184 -33.3554 9.837009935

      Best Regards

    Basel