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ADC32J44: What is meant by "quad channel device"?

Other Parts Discussed in Thread: ADC32J44, ADC34J44

Hello.

I'm a bit confused about the adc32j44 datasheet (http://www.ti.com/lit/ds/symlink/adc32j44.pdf)

The datasheet states "The detailed frame assembly for quad-channel mode is shown in Figure 158".  What is meant by "quad-channel mode"?  My understanding is that the ADC32J44 is a dual channel device.

Also, there are further references to four channels:

 - Table 17 - ALIGN TEST PATTERN, this bit aligns test patterns across the outputs of the four channels

-  Table 1 - Aperture delay matching - between four channels on the same device

I'm trying to figure out how the JESD framing works on this device, so I would like to know if Figure 158 is accurate. (The diagram seems to show 4 octets per frame when in LMFS 2221 mode...)

Thanks for the help.