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ADS5407: Replacement for ADS5407

Part Number: ADS5407
Other Parts Discussed in Thread: ADS54J66, ADS54J54, ADS54J64, ADS54J64EVM, TSW14J57EVM

Hello,

We need to update a module designed with ADS5407.

On this part, each channel has two interleaved ADCs operating at half the sampling rate, and at 180 out of phase of each other.

Is there a 14-BIT, 500MHz ADC that has each channel actually operating at 500 MHz and doesn't need interleaving correction?

Thank you very much,

Mircea

  • Hi Mircea,

    We have dual (and quad) channel ADCs that sample each channel simultaneously and can run at 14-bit resolution, 500MSPS or higher.

    Here is a parametric search which fits the above criteria:    

    At first glance the product that may best meet your criteria is the  All of the products mentioned here offer a JESD204B data interface.  

    Kind Regards,

    Mark 

  • Hi Mark,
    Which 14-BIT, 500MHz devices are not based on Interleaving of two channels at half the rate?
    E.g. ADS54J66 has interleaving.
    Thanks,
    Mircea
  • Hi Mircea,

    The www.ti.com/.../description (ADS54J54) is a 14-bit quad channel 500MSPS ADC and utilizes a non-interleaved architecture.

    Another choice is the www.ti.com/.../ads54j64. The ADS54J64 does use an interleaved architecture and the cores run at 500MSPS each, with two cores interleaved to internal rate of 1GSPS before the data is decimated by 2X at the output. Based on this method of operation you should not see interleave spurs with the ADS54J64. The ADS54J64 is highly programmable and there are many options to optimize performance for your system requirements.

    Kind Regards,
    Mark

  • Hi Mark,
    So, for a new system with 256 modules, each with 16 channels of 14-BIT, 500MHz ADC and with simultaneous sampling over all 4,000 channels, the ADS54J54 is an acceptable solution, right?
    What performance advantages would I have with the ADS54J64?
    Thanks,
    Mircea
  • Hi Mircea,

    For certain the ADS54J54 is a good solution for your system; however their are some advantages which the ADS54J64 will offer when compared to the ADS54J54. Below I highlight some of the differences.

    The ADS54J64 offers higher SNR and SFDR performance and with lower power dissipation when compared to the ADS54J54. Additionally the JESD204B lane rate can be operated up 10Gbps for the ADS54J64 compared to 5Gbps for the ADS54J54 and this translates into one JESD204B lane per ADC to operate the ADS54J64 at 500MSPS versus two lanes per ADC with the ADS54J54. The package size of the ADS54J64 is slightly larger (10x10) when compared to the ADS54J54 (9x9). The synchronization methodology for large multi-channel systems will be the same for either device.

    If you would like to evaluate the ADS54J64 here is a link to the evaluation platform: ADS54J64EVM. Additionally this evm will use the TSW14J57EVM for a data capture solution.

    If you have any additional questions about the architecture or performance of either device please let me know.

    Kind regards,
    Mark
  • Thank you very much,
    Mircea