This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS8330: ADS8330 in Manual Mode

Part Number: ADS8330
Other Parts Discussed in Thread: SN74LVC2T45

I use FPGA to control the ADS8330  with the mannual mode, when I power off the ADS8330 and power on again, the chip is frozen, but the FPGA is always powered on.  Please help me, thank you!

  • Hello,

    If I understand your question, you are removing power from the ADS8330, but the FPGA remains powered. If this is the case, then having voltage present on the digital communication lines with VBD at zero volts will violate the ABS specs. When this condition exists, the device will be partially powered through the digital IO lines, causing unpredictable behavior.

    Please make sure when the ADS8330 is powered down that no other voltages are present on the other pins of the IC. One way to accomplish this is to use a voltage translation buffer that isolates the digital signals when power is removed, such as SN74LVC2T45 or similar device.

    Thank you,
    Keith N.
    Precision Data Converters