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DAC60096: Layout Issues

Carolus Andrews
Mastermind 25145 points

Part Number: DAC60096

Team,

I have a customer with a mistake in their layout and one of the DAC outputs is shorted to AVSS.

In order to eliminate the short they need to drill an AVSS ViA but this will also detach pin F6.

This DAC has 16x AVSS (negative reference) pins.

The questions :

  1. What is the risk of doing nothing? (DAC output is pulled to -12V)
  2. Does the DAC will continue to operate normally if pin F6 is floating ?
  3. Do you think it wise to configure this output to -10.8Volt ?
  4. Is there a way to disable a specific output ?

 Datasheet p32 :

 

  • 0
    TI__Mastermind 46290 points

    Carolus Andrews said:
    • What is the risk of doing nothing? (DAC output is pulled to -12V)
    • Does the DAC will continue to operate normally if pin F6 is floating ?
    • Do you think it wise to configure this output to -10.8Volt ?
    • Is there a way to disable a specific output ?

    I do not believe that leaving F6 floating is an option just based on what perspectives I have concerning the construction of the device from the past, but I will double-check with people closer to this particular project's development.

    There is no output disable option, so no matter what this DAC output pin and the supply are going to fight for regulation over the net. That will mean increased current drive for both, with whomever having the better load regulation winning while the other "droops" (or rises depending on who won).

    These DAC channels are un-buffered voltage outputs as illustrated in Figure 32. So the VREFH/VREFL inputs are going to be impacted by this load regulation battle as well.

    I believe the ladder impedance is represented by the output impedance specification on Page 7 at 41kOhms typical so quite likely the supply is going to win and the reference voltage will be minimally impacted by this configuration.

  • 0 in reply to Kevin Duke
    TI__Mastermind 25145 points

    Kevin,

    Thanks for the response. Based off of the “fight” you define above, in a situation where AVSS “wins,” and there is an increased power draw on the output, is it possible to verify the following: 

      • Can this damage any of the other 95 outputs ?
      • Can this damage the DAC in general ?
      • pin F6 mustn’t left floating ?

     

    The customer has communicated thet they can live with one non-operational output and a bit more power. If  we can verify the above to be the case, we will do nothing. But if this will risk damage to the other 95 outputs – I'll recommend they take actions.

  • 0 in reply to Carolus Andrews
    TI__Mastermind 25145 points

    Kevin,

    Did you have any additional comments on my last questions?

  • 0 in reply to Carolus Andrews
    TI__Mastermind 46290 points
    Carolus,

    Sorry about missing the post.

    I do not believe that this will damage the DAC or adjacent DACs.

    I asked the design team about the floating pin condition and haven't received a reply. Let me reapply pressure on that side.
  • 0 in reply to Kevin Duke
    TI__Mastermind 46290 points
    Hello,

    Apologies for the delays but there were some priorities on the design team which impacted this. The F6 pin should not be left floating.