Hello,
I have questions regarding the data rate, clock rates and filter settings of the AFE5809.
I would like to use the AFE5809 to measure acoustic emmission signals up to roughly 1 MHz anaolg bandwidth so I would like to have a sample rate of 2 MHz.
The lowest sample rate for the AFE5809 seems to be 10 MHz (see data sheet p. 17) the lowest low pass filter frequency, however, is also 10 MHz (see data sheet p. 12) so I might get aliassing when sampling with 10 MHz, right?
The data (bit) clock rate is 6x or 7x the sample clock rate depending on whether using 12 or 14 bit resolution. On page 20 of the data sheet it is indicated that a data bit is send at every edge of the bit clock signal, i.e. raising and falling edge. Thus the lowest data rate ist 120 MHz, is that right?
The AFE5809 has a demodulator, a decimation filter and a down sampler. However, on page 66 it is said, that the LVDS FCLK rate keeps the same as the ADC sampling rate. i.e. the data rate to read from the LVDS keeps at least 120 MHz but many samples are set to zero and need not to be processed or forwarded to the next process?
Is there any way to reduce the clock rate of the LVDS?
I would like to bypass the down conversion (Figure 75. page 44) and just use the decimation filter and down sampler. I cannot find how the downsampled data is transfered on the LVDS, all documentation seems to refere to demodulated data i.e. I phase and Q phase. Has anyone more information on that?
Many thanks and best regards
Kai-Uwe
