AFE5818: is there any reference hdl code to receiver the serial lvds data?

hello

        to receive  the serial lvds data is not a easy thing,  xilinx supported a reference design xapp524 for serial adc data receiver, but there is a bug in the code and that can't support 1-wire ddr mode serial data. can ti support any reference code?

         my fpga is xilinx zynq7000. thanks a lot!