I need to interface ADS1158 with MSP430F5438. ADC is working in unipolr supply (AVDD=5v, Dvdd=3.3v).
I have checked the ADC pins DIN, SCLK & seem to be getting the data correctly from msp. But, I am not observing any data on DOUT.
Please help me to get the adc to respond.
Here's my code snippet:
#include "msp430x54x.h"
unsigned char MST_Data,SLV_Data;
void main(void)
{
WDTCTL = WDTPW+WDTHOLD; // Stop watchdog timer
P1OUT |= 0x02; // Set P1.0 for LED
P5DIR |= BIT1;// Set P5.1 for slave reset & P5.0 for cs
P5DIR |= BIT2;
P5OUT |= 0x03;
__delay_cycles(4096);
P5OUT |= 0x02;
P1DIR |= 0x03; // Set P1.0-2 to output direction
P3SEL |= BIT7; // P3.5,4,0 option select
P5DIR |= BIT4;
P5DIR |= BIT5;
P5SEL |= BIT4;
P5SEL |= BIT5;
UCB1CTL1 |= UCSWRST; // **Put state machine in reset**
UCB1CTL0 |= UCMST+UCMSB+UCSYNC+UCCKPL; // 3-pin, 8-bit SPI master //UCCKPL,UCMSB - inactive state is high
//UCB1CTL0 |= UCSYNC+UCMST; // Clock polarity high, MSB
UCB1CTL1 |= UCSSEL_1; // SMCLK
UCB1BR0 = 0x01; // /1
UCB1BR1 = 0; //
//UCB1MCTL = 0; // No modulation
UCB1CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
UCB1IE |= UCRXIE; // Enable USCI_A0 RX interrupt
P5OUT &= ~0x02; // Now with SPI signals initialized,
P5OUT |= 0x02; // reset slave
__delay_cycles(100); // Wait for slave to initialize
MST_Data = 0x49; // Initialize data values
SLV_Data = 0x8B; //
while (!(UCB1IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
UCB1TXBUF = MST_Data;
// Transmit first character
while(1)
{
__delay_cycles(50000);
while (!(UCB1IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
UCB1TXBUF = MST_Data;
}
//__bis_SR_register(LPM0_bits + GIE); // CPU off, enable interrupts
}
#pragma vector=USCI_B1_VECTOR
__interrupt void USCI_B1_ISR(void)
{
switch(__even_in_range(UCB1IV,4))
{
case 0: break; // Vector 0 - no interrupt
case 2: // Vector 2 - RXIFG
while (!(UCB1IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
if (UCB1RXBUF==SLV_Data) // Test for correct character RX'd
P1OUT |= 0x01; // If correct, light LED
else
P1OUT &= ~0x01; // If incorrect, clear LED
break;
case 4: break; // Vector 4 - TXIFG
default: break;
}
}