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DAC38J84: SYNCB vs SYNC_N_AB & SYNC_N_CD?

Jake Hillard
Prodigy 230 points

Part Number: DAC38J84

Hi Jim,

Which sync line should I break out to my FPGA? pins B7 and B6 give me a differential pair for the SYNCB signal, and there appears to be more documentation to support it as the JESD standard SYNC line. As best I can tell, sync_n is actually a link error reporting pin. Can you explain to me what sync_n is and how I should use it?

sync_n also isn't described in the functional block diagram. Is there an updated datasheet I could reference? 

Thanks,

   -Jake 

  • 0
    TI__Guru* 91947 points

    Jake,

    If you want to operate the DAC as two separate links, you would use SYNC_N_AB for link0 and SYNC_N_CD for link1. These are both single-ended CMOS signals. Most customers use the device as one link and use the differential SYNCB pair for the synchronization request to the transmitter (FPGA). The term sync_n in the data sheet is the sync request and can be assigned to all of these outputs.

    Regards,

    Jim  

  • 0 in reply to jim s
    Prodigy 230 points
    Hi Jim,

    By two separate links do you mean two separate JESD links? Like being routed to two FPGAs?
    I only want to use one FPGA and operate this DAC in LMFS mode 2441. My understanding based on what you've said is that we could just use syncb.

    Can we just use that syncb then?

    Thanks,
    -Jake
  • 0 in reply to Jake Hillard
    TI__Guru* 91947 points

    Jake,

    Yes, I meant two separate JESD links. You can use just SYNCb with 2441 mode or any other mode.

    Regards,

    Jim