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ADS1262: Internal resistors tolerance

Part Number: ADS1262

Dear Team,

Can you please advise on the customer question below.

We are using the ADS1262 and we would like to know what is the tolerance of the  internal 280 ohm resistance that combined the antialiasing filter.

What is the change due temperature?

Regards,

Nir

  • Hi Nir,

    Unfortunately, I don't have any information on the internal series resistance between the PGA and delta-sigma modulator inputs. There isn't really a good way of measuring this resistor, and quite likely, this is probably not a a true resistor but rather the on-resistance of the switch shown in Figure 71 of the data sheet. Is there a particular reason why this information might be useful to know?

    For anti-aliasing, I would recommend that an external RC filter be placed prior to the PGA inputs for maxim efficiency. Additionally, if it is a concern, it is possible to increase the CAPP and CAPN capacitance to 10 nF to provide additional noise filtering. I've seen some positive feedback on E2E that this change has resulted in slightly lower noise performance.

    Best regards,
    Chris
  • Hi Chris

    We need to knew the tolerance of the resistons for error calculations.

    We have 3 axis of sampling and want to knew what is the phase error due the antialaising filter. We have a 4.7nf 1% capacitors .

    Do you have any estamation for the varance of the resistors  between the the 3 AD .

    Regards , 

    Shaike

  • Hi Shaike,

    I don't have any data on the resistor tolerance to know for sure, but if I had to guess I would say it could be in the range of 20-50%.

    NOTE: I'm not sure that knowing the tolerance is all that helpful... There will be at least one, if not two, larger filters in the signal path that will have much larger phase delays, making the phase delay contribution of the CAPx RC filter insignificant...

    1) The ADC's SINC digital filter has a much lower bandwidth than the internal RC filter, so any phase delay incurred by the RC filter would likely not have an effect on the ADC's conversion result after the digital filter.

    2) The internal RC filter is not intended to replace an external RC filtering, which would likely have a lower cutoff frequency. If the phase delay of this external RC filter was larger, the tolerance of this external filter would be more important to the overall phase delay between VINx and CAPx.

    If you want want to see how much phase delay there is between the analog inputs (VINx) and the PGA outputs (CAPx), then you could apply a sinewave to the ADC inputs and measure the delay on output of the PGA (on pins CAPP and CAP). Chances are if you use an external anti-aliasing filter, then your external component tolerances will control the overall phase delay.

    Best regards,
    Chris
  • Hן Chris

    Thanks for the detail answer.

    I'm aware for the phase delay of the components you mention.

    My problem is the change of the phase delay between 3 channels of sampling.

    The phase delay of of the digital filter is the same for the 3 channels (using the same clock)-  so , it's not a problem for me.

    For the input filter , I can control the precition of the component and so control the variance of the phase delay between 3 channels.

    The 280 resistor tolerance is something that I can't control and I have to calculate the of the phase delay variance.

    do you have any idea what is th evariance betwen the AD from the same batch?

    Best regards,

    Shaike

  • Hi Shaike,

    What data rate will you be running that ADS1262 at and what will be the frequency(ies) of your input signal?

    I understand that you control the phase delays everywhere except internal to the ADC; however, because this is an oversampling delta-sigma ADC with relatively slow data rates, I believe that the internal phase delay will likely be insignificant when compared to the digital filter (plus any external anti-aliasing filter on the input). The digital output is going to be a representation of the time-averaged input signal; therefore it would take a significant phase delay to have any effect on the ADC's conversion result.

    If you need must know they additional phase delay or tolerance I believe this is something you will have to measure. The internal phase delay will depend, not only on the tolerance of the 280 Ohm resistors, but also input capacitance tolerance, input resistance tolerance, and tolerances in the PGA open-loop gain and bandwidth so the only way to measure the difference in phase delay would be to actually apply a signal to the inputs and measure the phase delay on the CAPP/N pins.

    Best regards,
    Chris
  • Hi Chris

    Sorry for the late responce - I was on vacation.

    Thank for your detal answer.

    The sampling rate will be 19200 SPS, the BW will be about 1Khz. We are using gain =1 .

    We need the information for error badget calculation .  I can meause the difference in phase delay on the CAPP/N pins but it will give me the results of this sample only. We need to knew the variance of the batchs.

    Do you have any estimation of the resistance (280 ohm) variance on the same batch?

    Best regards,

    Shaike

  • Hi Shaike,

    I've talked to some designers and the resistor's tolerance will likely be around 20%. I just don't have any characterization data to point to, to back up that number.

    Best regards,
    Chris
  • Hi Chris,

    Thanks for the effort.

    We take this number and add some margin  to our calculations.

    Best regards,

    Shaike