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ADS1292: ADC result

Vojin Ilic
Intellectual 435 points
Part Number: ADS1292

Dear TI,

I'm using ADS1292 for measuring current through current sense resistor. AVDD is connected to +3.3V. AVSS is connected to 0V (GND). VREFP = +2.5V. VREFN = 0V (GND).

IN1P - 0,916V (Voltage across sense resistor), IN1N - 0,416V (Voltage divider from reference 2.5V/6). I want to measure difference voltage 0,916V - 0,416V = 0,5V (about 1700000 AD units).

I want to turn on PGA with amplification of 4. Difference voltage 0,5 * 4xPGA = 2V output = 6800000 AD units, less than 8388608. I always get something about 4200000 AD units (about 1.25V - 2.5V refenence / 2). 

From ADS1292 data sheet, equation (7) I saw that max input voltage INP-INN < Vref / Gain. So from my example, 2V is 0.5V less than Vref.

Also from Table 10. it can be seen that full scale 0x7FFFFF = Vref (2.5V from my example) and 0x800000 = -Vref (0V from my example).

Can you please tell me where is problem with my AD units result, and why i cannot get 6800000 instead of 4200000?

Best regards,

Vojin Ilic

 

  • 0
    TI__Guru 66246 points

    Hello Vojin,

    Thank you for your post.

    First, let me clarify one detail about the ADC full-scale range. When the data sheet says that the input voltage can range from +VREF to -VREF, "VREF" is referring to the differential voltage between the reference pins (i.e. VREFP - VREFN = 2.5 V). Therefore, 0x7FFFFF = +2.5 V and 0x800000 = -2.5 V.

    The differential voltage you are trying to measure is acceptable since VIN * 4 V/V < VREF. However, I believe the problem you are seeing is due to the PGA input common-mode limitation. Please refer to equation 6 on page 22 of the datasheet. For a differential input of VIN = 500 mV, the input common-mode voltage must be greater than [0 V + 0.2 V + (4 V/V x 500 mV / 2)] = 1.2 V. Currently, your input common-mode is only (916 mV + 416 mV) / 2 = 666 mV. The output of the PGA is too close to the supply rail for linear operation, so the differential voltage at the ADC input will be less than expected.

    Best Regards,

  • 0 in reply to Ryan Andrews
    Intellectual 435 points

    Dear Ryan,

    thank you very much for your answer.

    Some things from your post are not clearly to me:

    1. I understand that input differential signal can be in range from "+VREF" to "-VREF". You said that if VREF-VREFN=2.5V => 0x7FFFFF will be +2.5V, and 0x800000 will be -2.5V. How is it possible is I use single supply on analog section? AVDD = 3.3V, AVSS = 0V. This means that mu differential voltage can not go below 0V. Can you please explain to me this?

    2. As I know common mode voltage is unwanted voltage in all differential measurements. Because of attenuation of common mode voltage, differential measurements are introduced. You said that common mode voltage must be greather than [0 V + 0.2 V + (4 V/V x 500 mV / 2)] = 1.2 V. Why? What is my signal is purely differential, without common mode. I can set differential voltage (500mV) + common mode voltage (0V) with signal generator. From your post, It is obvious that PGA will not amplify differential signal. Can you please explain to me why common mode voltage must exist in differential measurements? 

    Regards,

    Vojin

  • 0 in reply to Vojin Ilic
    TI__Guru 66246 points

    Hi Vojin,

    1. With a unipolar supply, the absolute voltage on each input pin cannot be negative. If INxP is less than INxN, and both INxP and INxN are positive with respect to ground, the differential input to the PGA will be negative. This will be represented by a code value between 0x800000 and 0xFFFFFF. Notice the MSB will always be '1' for negative values in binary two's complement notation.

    Vojin Ilic said:
    From your post, It is obvious that PGA will not amplify differential signal.

    The reality is actually the opposite: the PGA will not amplify the common-mode voltage. The ADC removes the common-mode when AINN is subtracted from AINP. Only the differential voltage (AINP-AINN) is compared to the reference. 

    The reason we need the input common-mode voltage to be away from the supply rails (AVDD, AVSS) is because the amplifiers used to make the PGA are not rail-to-rail amplifiers. Their linear range of operation are limited to 200 mV away from the supply. For example, if you set INxN to 1.65 V (mid-supply and connect 2.35 V to INxP, you will still measure 500 mV x 4 V/V at the ADC output.

    Best Regards,