Other Parts Discussed in Thread: ADS1287D
I'm confused about the input mux function. Does the ADS1283 yield simultaneous sampling for both channels or are the output samples staggered (time shifted)for one channel relative to the next?
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Hi John,
Welcome to the TI E2E Forums!
The ADS1283 is a multiplexed ADC, so channel conversions are staggered in time, as the multiplexed ADCs are only able to sample one input channel at a time.
Note that the wide-band FIR filter of the ADS has a very long settling time due to its many taps (~63 conversion periods for data to be fully-settled), but there is also a SINC5 filter option with a faster settling time (~5 conversion periods). When used to sample multiple accelerometers in parallel, usually there will be one ADS128x device per sensor to measure signals simultaneously.
There is also a similar dual ADC option, the ADS1287D, which would allow for simultaneously sampling of two channels at a time.
Best regards,
Chris
Thanks very much for your prompt and helpful response Chris. I am familiar with the SINC5 vs. wide-band options and related latency issues. In our applications (geophysics) we are primarily interested in fidelity and measure under a wide range of unpredictable circumstances whereby the possibility of aliasing from various EM fields - natural and man-made - is a concern. So, we prefer anti-aliasing assurances, which I believe comes only with the wide-band option, correct? Under that assumption and also assuming that the wide-band impulse response is something like 21 samples, then is the stagger (time-shift) width between one channel and the next 21 samples? I'm guessing this must be the case as the sigma-delta process would require such, eh? Lastly, if the staggering is indeed 21 samples then we will have lost our anti-aliasing assurances … I'd think. Correct?
Hi John,
The wide-band filter offers better stop-band rejection, but I believe both wide-band and SINC filters will have some susceptibility to aliasing. The digital filter's frequency response will repeat (and be mirrored) around the ADC's sampling frequency. In the case of the ADS1283, the modulator sampling frequency is fMOD = fCLK/4 (~1 MHz). Therefore, signals that occur at integer multiples of the modulator sampling frequency can still alias back into the digital filter's pass-band.
Since Delta-sigma ADC's oversample the input signal (such that the sampling frequency is much higher than the output data rate), a simple RC filter placed on the analog input pins of the ADC is usually sufficient to prevent aliasing. This RC filter would just need to be sized such that it provides some desired amount of attenuation around 1 MHz.
Do keep in mind that there will be a trade-off when selecting a filtering capacitor. Larger capacitors tend to have poorer quality dielectric materials with voltage coefficients of capacitance. Using these types of capacitor on the analog inputs of the ADS1283 can lead to poor THD performance. I would recommend using only C0G-type capacitors as they have very low coefficients of capacitance; however, due to lower dielectric constants, they only are available in capacitances of less than 120 nF for 1206 and about 15nF at 0603 package sizes.
Best regards,
Chris
Thanks again Chris - and sorry for the late acknowledgement. We'll likely stick with the dedicated/unmultiplexed devices. Regards - John