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ADS5263: ADS5263 Bit-Byte-Word Mode

Carlos Silva85
Expert 4915 points

Part Number: ADS5263

Looking through the datasheet for the ADS5263 - it talks about three data transmission modes: Bit-wise Mode, Byte-wise Mode and word-wise mode this can be seen in table 7 (Summary of Output Interface Options (continued)) and figures 53 to 58.

 

However, the register map to configure the three mode is somewhat confusing and only refers to Word wise mode & Byte-wise mode (register 0x28).  We’ve designed our FPGA to take the bit-wise data stream from the ADC, as outlined in the early sections of the datasheet. But cannot see the register to configure the ADC to output this format?

 

Register 0x28 states how to enable word- wise mode but if it’s left disabled, its Byte-wise mode:

 


Please could you clarify the datasheet and advise if the bit-wise mode is a feature and if so, what registers do we need to set to  output this data format? 

  • 0
    TI__Genius 12025 points
    Hi Carlos,
    How are you?
    Thanks for using ADS5263 device.
    We will look into these three mode settings.

    Thank you!
    Best regards,
    Chen
  • 0 in reply to Chen Kung
    TI__Genius 12025 points

    Hi Carlos,

    How are you?

    Yes, you are correct.

    The ADS5263 datasheet does not describe how to set up bit-wise mode register.

    We have tested the ADS5263 EVM on our bench.

    Here is the correct register needed to be set for running bit-wise mode:

    Please set the register shown as below:

    And please try it.

    Of course, this only affects the ADS5263 GUI only.

    When you are using TSW1400 EVM to capture the output data from ADS5263,

    you also need to make sure you can load the correct ini file

    in order to run High Speed Data Converter Pro GUI correctly.

    Have a nice day!

    Thank you very much!

    Best regards,

    Chen