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TVP5154 initialize fail??

Other Parts Discussed in Thread: TVP5154, TVP5154A

Dear Sir,

I use TV decoder tvp5154 and set it as below

    write 0x0F to  0xFE

    write 0x00 to 0x7F
    write 0x0F to 0xFE
    write 0x6D to 0x03
    write 0x1B to 0x17
    write 0x81to 0x15
    write 0x32 to 0x02
    write 0x76 to 0x09
    write 0x94 to 0x0C
    write 0xC0 to 0x0A
    write 0x02 to 0x28

I am run-in test for power on then off repeatedly. Sometime one of tvp5154's decoder output wrong video image and others is normal.

I get image form abnormal decoder as below. Someone can give me suggestion for this situation.

Really appreciate your help!!

Best Regards,

Kuve

  • The TVP5154 (NRND status) requries a special start-up sequence to guard against this issue.  See Section 8 of the TVP5154 datasheet.

    This start-up sequence is not requred for the TVP5154A device.

  • Hi Lary,

    Actually, we use TVP5154A (the printing on chip is 02AP4RTG4/TVP5154AI).

    Does TVP5154A need specific start-up sequence to follow?

     

    BR,

    Rex Liao

  • Rex,

    The TVP5154A does not need the special start-up requried for the TVP5154.  You do still need to provide the recommeded power-up delays and reset as shown in the datasheet, however.

    When programming and setting up the individual decoders, make sure that REG FEh is set appropriately.

    BR,

    Larry

  • Larry,

    We alraedy check our design meet  datasheet  section 7.3 Power-On Reset Timing requirements.

     

     

    And as previous Kuve's description, our I2C communication is very simple, just porgramming all 4 decoders one time when system boot, so the REG FEh always 0xf.

    We do not understand, why the commands all send to TVP5154A four decoders at the same time, but one of the decoder core (sometimes decoder code 1, sometime decoder core 3) is failed.

    We had add some test code to read back all REGS we configed when the initialzation failed; we found sometimes the failed decoer core's REG 03h become 0x32 (the value shall be 0x6D), and sometimes all REGS of failed decoder core read back are all the same as we configed but it still failed.

    Anything we missed?

    BR,

    Rex Liao

     

     

  • Rex,

    Have you seen this problem on multiple TVP5154A devices or multiple boards?

    What are your test conditons?  Room temperature and nominal power supplies?

    What is your loop failure rate?

    This issue should not be occuring with the TVP5154A version.

    BR,

    Larry

     

  • Larry,

    This problem occur on multiple boards, this is why we are concerned.

    Our test environment is at nomal office, has air condition at day, air condition will close when no one at office (maybe pm10:00~AM8:00).

    We will do overnight test until it fail.

    The power source is DC12V switch power adapter.

    The loop failure rate is around 1/3000.

    Our device will be used on vehicle, this is why we test the device by power on/off repeatedly. 

    We setup two test sets to reproduce failed situation,  all of them can occur failed situation.

    As previous discussion,we send I2C data to four decoders of TVP5154A at the same time. But one decoder core is failed.

    Is it possible?

    Or shall we follow Section 8 of the TVP5154 datasheet as you mentioned to check TVP5154A status? 

     Is this action useful?

    BR,

    Rex Liao

     

     

     

  • Rex,

    We will look into this and do some testing here.

    I think it is a good idea to try the TVP5154 Section 8 procedure to see if it resolves your issue.

    BR,

    Larry

     

  • Larry,

    During this week, we try the TVP5154 Section 8 procedure, but the result is still the same.

    one of the decoder core is still failed.

    And we read back all REGS of failed decoder core, they are all the same as we configed.

    This time we aslo read back REG 81h, the value is 0x54h as datasheet decribed.

    So do you have any idea to solve this issue? How about your testing result?

    BR,

    Rex Liao

  • Dear all,

    Do you have any staus update?

    Or shall we not use TVP5154A in autmotive applications?

    BR,

    Rex Liao

  • Rex,

    We were not able to reproduce any issues here using our EVM and power cycling the 5V DC power to the EVM.  The reset on the board was automatically generated by a TLC7733 at power up.

    When in a failed state, if the failing deoder reports 54h ID in REG 81h, reports horizontal and vertical locked status in REG 88h, and if the output clock and data are working for this device, then the issue is not related to the original TVP5154 power up issue.

    Is there any chance that this is related to a synchronization or start-up issue with a back-end processor?

    In the past, we have seen strange issues that would occur at a particular time at night ,maybe due to PC time or builiding power.  Does this issue occur at any time of the day?

    BR,

    Larry

     

     

     

  • Larry,

    The failing deoder core reports 0x54h ID in REG 81h and 0x1Eh in REG 88h.  (horizontal and vertical are locked)

    The status of REG 88h is the same as the other 3 successful decoder core. We can't see any difference on them.

    Our back-end processor is DM642, we use it for a long time.

    This project just replace four ADI video decoders to one TVP5154A.

    So the back-end video port firmware code is mature and already in the market for a long time.

    The only difference is video decoder I2C communication data.

    About power particular time factor,this issue can occur at any time of the day.

     

    BR,

    Rex Liao

     

     

     

  • Rex,

    Can you halt on fail and then reset/restart the DM642 frame capture.  There have been some issues reported with some processors related to disruption in the video stream.  It is possible that the failing channel is taking longer to establish lock and provide a valid and stable output. 

    Another option might to delay DM642 frame capture startup following test power-up to see if this has an effect.

    BR,

    Larry