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DAC3482: No Output

PK_ICT
Prodigy 60 points
Part Number: DAC3482

I have been unsuccessful in configuring the DAC3482 EVM to produce an analog output signal.  I just need a minimalist configuration to produce an analog output from 8-bit digital input with the following parameters:

DACCLK: 1GHz

DATACLK: 125MHz

Data Interface: Byte-Wide, D[7:0] (D[15:8] are tied off)

FIFO In Sync:  FRAME (No parity, pulse every 8 samples)
FIFO Out Sync: FRAME
Data Format:   FRAME

Input Format: 8-bit Dual mode, 2's Compliment
Data Delay: 200ps
Clock Delay: 0ps

PLL: Disabled

Interpolation: 1x
Digital Mixer: Bypass

  • 0
    TI__Guru 71149 points
    Hi Michael,

    Unfortunately, the DAC3482 in 8-bit LVDS bus mode only support up to 312.5MSPS of baseband input rate. This is limited by the LVDS bus rate of 1250Mbps.

    This means that with 1GSPS of DACCLK, you will need to enable the 4x interpolation mode with 250MSPS of input rate at the 8-bit LVDS bus. You cannot use 1x interpolation in this case.

    We also recommend using the dataclk delay instead of the data delay. The use of data delay will also shift the delay of the FRAME signal with respect to the DATACLK, and hence this may not be able to create the setup/hold time delay with respect to the DATA + FRAME to the DATACLK depending on your logic implementation.

    Let me know if the 4x interpolation would work for you.

    -Kang
  • 0 in reply to Kang Hsia
    TI__Guru 71149 points
    Waiting for user feedback....
  • 0 in reply to Kang Hsia
    Prodigy 60 points

    I am supplying a 1GHz clock to EVM CLKIN (J9) have an input data rate of 62.5Msps so am setting interpolation to 16x, but still no output.  See attached DAC3482 EVM register configuration file.

    DAC3482_mjp_1GHz_16xint_62.5MHz_QMCon.txt 
       x00	   xF88C
   x01	   x0000
   x02	   x0042
   x03	   xF001
   x04	   x5DFD
   x05	   x0260
   x06	   x2500
   x07	   xFFFF
   x08	   x0000
   x09	   x8000
   x0A	   x0000
   x0B	   x0000
   x0C	   x07FF
   x0D	   x07FF
   x0E	   x05A6
   x0F	   x05A6
   x10	   x3000
   x11	   x0000
   x12	   x0000
   x13	   x0000
   x14	   x0000
   x15	   x0640
   x16	   x0000
   x17	   x0640
   x18	   x205F
   x19	   x10F4
   x1A	   x4820
   x1B	   x0800
   x1C	   x0000
   x1D	   x0000
   x1E	   x1111
   x1F	   x8882
   x20	   x2400
   x22	   x1B1B
   x23	   x001F
   x24	   x1000
   x25	   x7A7A
   x26	   xB6B6
   x27	   xEAEA
   x28	   x4545
   x29	   x1A1A
   x2A	   x1616
   x2B	   xAAAA
   x2C	   xC6C6
   x2D	   x0004
   x2E	   x0000
   x2F	   x0000
   x30	   x61A8
   x7F	   x0004
CDCE62005 Registers
Freq:19.200000MHz
Address	Data
00		80400000
01		813C0001
02		81400002
03		C10C0003
04		81400004
05		29F01A55
06		44AF0006
07		165294A7
08		20001808

  • 0 in reply to PK_ICT
    TI__Guru 71149 points

    Hi Michael,

    I will take a look in the next few days.

    Could you confirm how you are interfacing with the DAC3482 EVM? Through the TSW1400 Pattern Generator and HSDC PRO?

    -Kang

  • 0 in reply to Kang Hsia
    Prodigy 60 points

    Yes, I'm using the TSW1400 and HSDC Pro on the evaluation platform.  But I've received this hardware second-hand and am beginning to suspect there might be an issue with it.  However, I did make a little progress on my real hardware yesterday.  Once I set the interpolation rate correctly (16x), I began seeing something coming out of the DAC.  The analog signal doesn't look correct, but at least I'm getting a signal.  I have an FPGA that is driving the SPI interface and generating the DDR data into the DAC.  I'm going to set the EVM aside today and focus on making addition progress on my hardware.

    My original goal with the EVM hardware was to quickly find a simple configuration of the DAC that would allow me to route data through the part without the NCO.  I planned to code up those register settings and write them out to the DAC SPI on my hardware.  This would put my DAC in a verified functional configuration so I could focus on debugging the FPGA data interface.  If you could take the DAC configuration file that I uploaded and look at it in the DAC3482 EVM software and verify that I don't have something configured incorrectly, that would be very helpful.  Thanks.

  • 0 in reply to PK_ICT
    Prodigy 60 points

    Hi Kang,

    Any concerns about the DAC3482 configuration file I uploaded?

    --Michael

  • 0 in reply to PK_ICT
    TI__Guru 71149 points

    Hi Michael,

    I have not yet gotten the 8bit bus mode to work. I hope the TSW1400 FPGA firmware update didn't break the 8bit bus mode configuration from the FPGA side.

    I have made the 16-bit bus mode at 16x interpolation to work. You can see the ppt file for my setup and also the configuration file attached. I will try again on the 8bit mode.DAC3482 Setup.pptxDAC3482_16bitbus_16x_NCO30MHz_1000MSPS

  • 0 in reply to Kang Hsia
    TI__Guru 71149 points

    Hi Michael,

    Please see below for verified script and HSDC PRO setup. I will close this post for now and you can always reply if you have additional questions

    -Kang

    DAC3482 Byte Wise Operation.pptx

    DAC3482_16x_Byte_Wise_1000MSPS_62p5MSPS_DACbbrate.txt 
       x00	   xF888
   x01	   x0800
   x02	   x0052
   x03	   xA001
   x04	   xFFFF
   x05	   x0060
   x06	   x2D00
   x07	   xFFFF
   x08	   x0000
   x09	   x8000
   x0A	   x0000
   x0B	   x0000
   x0C	   x05A6
   x0D	   x05A6
   x0E	   x05A6
   x0F	   x05A6
   x10	   x3000
   x11	   x0000
   x12	   x0000
   x13	   x0000
   x14	   x28F6
   x15	   x0F5C
   x16	   x28F6
   x17	   x0F5C
   x18	   x205F
   x19	   x10F4
   x1A	   x4820
   x1B	   x0800
   x1C	   x0000
   x1D	   x0000
   x1E	   x1111
   x1F	   x8880
   x20	   x2201
   x22	   x1B1B
   x23	   x001F
   x24	   x1000
   x25	   x7A7A
   x26	   xB6B6
   x27	   xEAEA
   x28	   x4545
   x29	   x1A1A
   x2A	   x1616
   x2B	   xAAAA
   x2C	   xC6C6
   x2D	   x0004
   x2E	   x0000
   x2F	   x0000
   x30	   x61A8
   x7F	   x0004
CDCE62005 Registers
Freq:19.200000MHz
Address	Data
00		80400000
01		813C0001
02		81400002
03		C11C0003
04		C11C0004
05		29F01A55
06		44AF0006
07		165294A7
08		20001808

  • 0 in reply to Kang Hsia
    Prodigy 60 points

    Thanks, Kang.  I have downloaded and tested both your 16-bit and 8-bit (byte-wise) configuration files and still do not see any output from the DAC.  This further confirms that I am having some issues with the EVM hardware that I am working with.  I will see to obtaining a new EVM system before proceeding further.  Thanks again for you help with this.

  • 0 in reply to PK_ICT
    TI__Guru 71149 points

    Hi Michael,

    Could you please check the EVM Jumper to see if it matches with the user's guide recommendation? If some of the jumpers are inconsistent, you may not be able to get an output too. Perhaps it is a last resort before you order another EVM.

  • 0 in reply to Kang Hsia
    Prodigy 60 points

    Hi Kang,

    I have verified the jumper setting on the EVM, and they match the default settings shown in the table that you provided.

    Thanks,

    Michael