ADS54J20EVM: ADS54J20

HARSHA K

Part Number: ADS54J20EVM
Other Parts Discussed in Thread: ADS54J20

In the reference schematics, we are seeing some intermediate voltage transitions to generate the needed voltage for the DAC. Any specific reason for this? Is it mandate to follow in our application circuitry? Please share your feedback. Your timely response is highly appreciable.

Following are the power tree:

5V---> 3.7V-->3.3V--->DAC

5V---> 3.7V---> 3.0V--->DAC

5V--> 2.3V-->1.9---> DAC

2.3V--->1.9V--> DAC

2.3V--->1.15V---> DAC

Thank you,

K.Harsha

over 6 years ago

0 jim s over 6 years ago

TI__Guru* 91947 points

The title of this post is for an ADC but you are refereeing to a DAC in the post. Did you mean to mention a DAC device?

Regards,

Jim

0 HARSHA K over 6 years ago in reply to jim s

Prodigy 170 points

Hi,

I am asking about ADC.

0 jim s over 6 years ago

TI__Guru* 91947 points

Harshak,

To minimize the power loss of the LDO regulators, the lower the delta between the output and input voltage (up to a specified minimum per the data sheet), the better.

Regards,

Jim

0 HARSHA K over 6 years ago in reply to jim s

Prodigy 170 points

Hi,
I am aware of power loss in the LDO due to large delta difference between output and input voltage. I wanted to know whether it will have any impact on ADC if 5V converted to 1.15V in terms of noise.
Regards,
Harsha

0 jim s over 6 years ago in reply to HARSHA K

TI__Guru* 91947 points

Switching Supply App note.pdfHarsha,

It will depend on what you are using to convert the voltage down to 1.15V. But since this is the power for the JESD transmitter, it is not as sensitive to noise as the other supplies. This supply does draw the largest amount of current (typ ~ 566mA) so there will be a large amount of power loss if you plan on using a LDO for this supply with a 3.85V voltage drop across it. Are you asking this because you are planning on using a switcher supply for this voltage? If so, I thing you will be OK. Attached is an app note regarding this application TI did on another ADC but should be applicable for the ADS54J20 as well.

Just make sure to follow the power sequencing as shown in Table 10.1 of the data sheet.

Regards,

Jim

0 HARSHA K over 6 years ago in reply to jim s

Prodigy 170 points

Hi,
Thanks for the timely response. We are following the power sequence sir. In our schematics, we are following the below power sequence:

We are using LDO TPS7A8300ARGWT for each conversion for the following conversions.
5V--> 3.3V_DAC
5V--> 3V_DAC
5V--> 1.9V_DAC
5V--> 1.9V_DAC
5V--> 1.15V_DAC

Please let me know will it have impact on ADC in terms of noise.

Thanks.
Harsha

0 jim s over 6 years ago in reply to HARSHA K

TI__Guru* 91947 points

Harsha,

Since the IOVDD LDO will be dropping over 2W of power, I would send a post to the power group forum to get their opinion regarding this. Otherwise, all of the other supplies will be fine.

Regards,

Jim

0 HARSHA K over 6 years ago in reply to jim s

Prodigy 170 points

Jim,
Thanks for the update. Will wait for your response on IOVDD LDO.

0 jim s over 6 years ago in reply to HARSHA K

TI__Guru* 91947 points

Harsha,

I need you to post the question to the power group. I do not have the BW right now to support this.

Regards,

Jim

0 HARSHA K over 6 years ago in reply to jim s

Prodigy 170 points

Hi Jim
Thanks for your support.

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ADS54J20EVM: ADS54J20