• State Resolved
  • Locked Locked
  • Replies 7 replies
  • Answers 1 answer
  • Subscribers 46 subscribers
  • Views 1740 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS1255: Noise issue while clocking an ADS1255 with the CLKOUT pin from another ADS1255

user5163865
Genius 4040 points
Other Parts Discussed in Thread: ADS1255

Hi,

Our customers are using two ADS1255 to develop analytical instruments.
Xtal is used for the main ADC and CLKOUT output is connected from the main ADC to the sub ADC.

However, when the clock output is turned on, the Xtal oscillation and the two ADC conversion results are abnormal.
Variation at input short circuit: 0.001 V -> 0.1 V

I think PCB layout may be a problem. The device used is as follows.
Xtal: CX5032GA08000HOHEQ Kyocera
C: 15 pF

There is questions.

It can be understood that the conversion result of the sub ADC gets worse due to this influence. Why is the conversion result of the main ADC also abnormal?
Customers say Xtal's oscillation will be abnormal. Is this incorrect?
Does the two ADCs share CLKOUT as a clock?
If so, you can understand that the conversion results of the two ADCs are abnormal.

Please tell me the cause and measures.

Best regards,

Hiroshi

  • 0
    TI__Mastermind 44720 points

    Hi,

    Would you be able to share a schematic of the circuit?

    Also, do you know if there a dedicated PCB ground plane layer below the ADCs, or is the ground plane only poured on the top layer?

    In the attached image it appears as if AGND and DGND do not connect though short paths. It is possible that the CLKOUT signal may be creating a lot of noise on these ground planes, and in turn interfering with the conversion results of both ADCs.

    user5163865 said:
    Customers say Xtal's oscillation will be abnormal. Is this incorrect?

    I am not sure what you mean by the XTAL oscillating being abnormal. Is the customer observing abnormal behavior on the crystal? If so, would you be able to describe the abnormality?

     

    user5163865 said:
    Does the two ADCs share CLKOUT as a clock?

    The current configuration is correct. CLKOUT is an output signal and it can be routed into the CLKIN input pin on another device.

     

    Best regards,
    Chris

  • 0 in reply to Christopher Hall
    Genius 4040 points

    Hi Chris,

    Thank you for your reply.

    I will check the GND Plane.

    # Customers say Xtal's oscillation will be abnormal.

    --> Not stable frequency not only CLKOUT. But I think It is difficult to measure. their measurement method may be incorrect.

    # Does the two ADCs share CLKOUT as a clock?

    --> My question is whether two ADC clocks are essentially the same or not.

    EX. a) Same clock  essentially.

    EX. b) Bufferd Clock OUT --> Buffered IN

    I think that this configulation is a). Since the results of the two ADCs are abnormal when the clock is shared.

    In the case of B, I think that only the sub ADC is abnormal.

    The customer suspects a device failure. I want to tell this condition accurately.

    Best regards,

    Hiroshi

  • 0 in reply to Christopher Hall
    Genius 4040 points

    Hi, Chris

    Attached the schematic.

    Could you confirm it ?

  • 0 in reply to user5163865
    TI__Mastermind 44720 points

    Hi Hiroshi-san,

    Thank you for posting a schematic!

     

    I don't see any issues from the schematic perspective...

    On the layout, how closely are the PA06 and PA07 jumpers to the ADC's? Generally, I don't recommend separating the analog and digital grounds; however, if these connections are kept short and very close to the ICs it may not be an issue.

    Regarding your earlier question about the relationship between CLKIN and CLKOUT...

    I believe the signal on the CLKIN input is buffered (likely by a comparator) and output on the CLKOUT pin. So for two ADC's the clocks are similar but they differ in twos ways:

    1. The CLKIN signal for a crystal will be a sine wave, while the CLKOUT signal is a square wave.
    2. There will be some propagation delay between CLKIN and CLKOUT.


    The following oscilloscope screenshot was taken by probing the CLKIN and CLKOUT signals on the ADS1256EVM:

    Since the CLKOUT signal is converted to a square wave it will contain higher frequency content and could be more disruptive to the PCB ground plane. I would recommend increasing the size of R96 on your board (perhaps try 100 Ohms) to slow down the rising and falling edges of CLKOUT and see if it helps improve noise performance.

    Best regards,
    Chris

  • 0 in reply to Christopher Hall
    Genius 4040 points

    Hi Chris

    Changing the resistance to 100 ohm solved the problem.
    I greatly appreciate your support.

    # Zero ohm

    #100ohm



    They are worried about whether problems will occur again due to device variability.

    I would like to explain the validity of the resistance value (or present a better resistance value) and close this problem.

    I understand that the variation of CLKOUT output impedance of ADS1255 is the cause of this problem.

    ADS1255 output impedance: about 10 Ω
    General PCB  line: about 20 to 100 Ω

    #When the PCB line is made thick and short, the impedance is close to ADS1255.
    #This is a "Start up issue" . if it starts normally, it does not occur during operation.

    I am planning to explain like this, but do you have better advice? and point out my misunderstanding.

    Best regards,

    Hiroshi

  • 0 in reply to user5163865
    TI__Mastermind 44720 points
    Hi Hiroshi,

    I think this problem may be a signal integrity issue (with CLKOUT). As you can see in the oscilloscope screenshot there is a fair amount of ringing on the CLKOUT signal, and adding the 100 Ohm resistor seems to have helped reduce the ringing and improve signal integrity.

    In this case, I would experiment with larger resistor values to see if you can further cleanup the CLKOUT signal. This resistance works in combination with the parasitic capacitance to create an RC filter on CLKOUT and to slow down the rising and falling edges of the clock.

    The split ground plane may be part of the problem since it will make the CLKOUT trace more inductive, as compared to a "Microstrip" trace that is located directly above a ground plane. The inductive nature of the CLKOUT trace will make it more sensitive to the fast CLKOUT signal edges.

    Best regards,
    Chris
  • 0 in reply to Christopher Hall
    Genius 4040 points

    Chris-san

    Thank you for your early reply.

    I will reply to them as the final report.

    Best regards,

    Hiroshi