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CCS/ADS1248: Bad ADC value for multiple channel

Part Number: ADS1248

Tool/software: Code Composer Studio

Hello,

I use ADS1248 for measure 2 differentials voltage.
One have unit gain but one need 64 gain value.

I have to do 2 measures each 2ms.

My psedo code :
DR : 2kSPS
Supply ADS
RESET High
START High
SET RDATAC

While()
{
Wait timer interrupt (each 2ms)
For(2)
{
Wait DRY Low
CS Low
Read ADC Value and Change channel (on same SPI communication)
Change Gain
CS High
}

Save measure in RAM
}

My problem :
1% of ADC value are wrong (value = 0 or 0x7FFFFF).
If I put a delay between change channel register and Gain register all values are good but I need more than 2ms.

Could you say me the minimum time betwwen two ADS register change?

Thanks

  • Hi Gregoire,

    I would change a few things.  As your data rate is much faster than your time to collect, instead of using RDATAC mode I suggest using SDATAC mode then read the data by RDATA command.  This will prevent data corruption if an update should occur during the data read.

    Second, make sure that you do not overload the PGA at a gain of 64.  An overload can occur when the GAIN is at 64 and then you switch channels from the lower voltage signal to the higher voltage signal.  Once the PGA has over-ranged it will take some period of time to recover.  One way to prevent this is to always switch to a gain of 1 before changing the mux.  Your pseudo code may look something like this:

    DR : 2kSPS
    Supply ADS
    RESET High
    START High
    SET SDATAC

    While()
    {
    Wait timer interrupt (each 2ms)
    For(2)
    {
    Wait DRY Low
    CS Low
    Use RDATA to read ADC Value and Change GAIN to 1

    Change channel (on same SPI communication)

    Change Gain appropriate to mux input
    CS High
    }

    Save measure in RAM
    }

    Of course there are many ways to accomplish the same task, such as setting a flag when the GAIN is at 64 so you know that the GAIN should be switched prior to the mux.

    Best regards,

    Bob B

  • Tanks bob for this solution,

    My collect information and change register need less than 300µs, one conversion need more than 500µs and ADS restart ADC conversion after each access of its 4 first register.
    So i think i haven't any problem here.

    But your second theory could be my problem.
    After change order to replace gain and mux register I have better result. I have to do more test but I think is the good way.

    Thk