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Original question:

ADS1298 CMRR - test setup from SBAA188 - how to get 96dB ?

ADS1298: Ideal method for determining 50/60Hz noise coupling.

stomp
Genius 4735 points

Part Number: ADS1298

Hi,

I have a ADS1298 in a simple system with 1 channel enabled, gain = 12, bipolar power supply (+2.5, -2.5),  1Ksps ADC, RLD output driven from CH1+/-.

My device is battery powered and not connected to any mains powered devices and is very similar in design to the ADS1298ECGFE-PDK

I am using the device in a surface EMG application. On a limb I have a pair of electrodes spaced about 50mm apart over a muscle and at the end of the limb I have the RLD electrode. Electrodes are connected to my hardware via shielded cables with SMA connectors.

The data I've collected from the ADS1298 shows about 250uV of 50Hz noise, and this is about 25% of my signal, which is really bad. The noise is not present when I short the electrodes together.

I've had a look at sbaa188.pdf and I notice an anomaly between the ADS1928EVM's input filters (of 47pF capacitors) and the sbaa188.pdf's values of 47nF.

I'm interested to know what the best route of determining how the 50/60Hz noise is getting into the system and what is the best way of dealing with it.?

If I want to measure the CMRR could I simply set the gain to 1, join CH1 +/- together at the electrodes and inject a 10Hz, 1Vp-p signal?.

If I measure the Input and capture the output signal from the ADC, would this be accurate enough for a CMRR measurement? and therefore would the CMRR measurement give me a better indication if the 50/60Hz noise is getting into my system based on some poor CMRR value?

Thanks

Stomp!.

  • 0
    TI__Guru 69476 points

    Hello Stomp,

    Thank you for your post!

    Although you are using a battery power supply and shielded cables, it's still possible for power line noise to couple onto the surface of the board and onto the body from the lights. This is why the RLD technique is needed, even for battery-powered ECG applications.

    It sounds like you're doing everything else right by enabling IN1P and IN1N for RLD common-mode derivation (I assume the bits RLD1P and RLD1N are set to 1). Have you checked the RLD output to verify that the inverted common-mode signal is there? Alternatively, you can measure the RLD output internally against RLDREF. Simply short RLDOUT to RLDIN, set the MUX[2:0] bits to 010 for any channel, and set RLD_MEAS to 1.

    Regarding the input RC filters, the only impact I can see on CMRR is that the lower cutoff frequency may help filter out higher harmonics of the 50 Hz / 60 Hz power line noise. Generally, we don't recommend setting the cutoff frequency any lower than 10x your desigred signal bandwidth.

    The way you are measuring CMRR is correct. Just make sure that sine wave is centered around mid-supply in order to stay within the PGA input range. Remember that CMRR will worsen as frequency increases.

    Is it possible for you to try replacing any common-mode capacitors to ground with a differential capacitor instead? This would help improve CMRR since any error in the capacitance tolerance would be common to both inputs.

    Best Regards,

  • 0 in reply to Ryan Andrews
    Genius 4735 points
    Hi Ryan,

    Thanks for taking the time to answer my question.

    I have the RLD output working, but I feel its very difficult to measure or determine if the RLD is inverted, I can only say that it is inverted by design. I think I will try the internal RLD measurement technique as this would be the most easiest way to verify without introducing extra noise sources from scope leads, etc.

    For our application we have a signal we wish to measure in the range of 10-150Hz, with a 100uVp-p amplitude.

    For the differential input capacitors: This is something I have not considered. My current setup is as per the ADS1298ECGFE-PDK which is two RC filters in series (capacitors to ground).

    Are you suggesting placing a capacitor across the INxP and INxN? If so do you know if there is an application note about this?. Making this change is very trivial, but I'd like to understand what the impact on our signal quality would be.

    Thanks again for your time.

    Cheers.
  • 0 in reply to stomp
    TI__Guru 69476 points

    Hi Stomp,

    As you saw in the application note (Improving CMR Using the RLD), component tolerance is one of the biggest factors that can worsen CMR performance. By replacing the common-mode caps with a differential cap, you remove the CMRR loss due to the capacitor tolerance. Of course, you still have the resistor tolerance to deal with, but it's easier to get lower value resistors at a reasonable cost (typically 1% or better is used).

    The differnetial cap should not have any negative impact on the signal quality. Simply size the cap to set the desired signal bandwidth while keeping the resistors large enough for patient protection. 1 kHz to 10 kHz is usually low enough for antialiasing, so 470 pF is a good start. Even if you keep the 47 pF common-mode capacitors, the differential filter will roll off about 1 decade earlier in frequency, which will mitigate some of the CMRR loss due to common-mode capacitor mismatch.

    Best Regards,