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DAC1220 C1 & C2 pins

al welch
Prodigy 100 points
Other Parts Discussed in Thread: DAC1220

I have an existing product that uses the DAC1220. I would like details regarding the C1 & C2 cap pins beyound what is in the data sheet. What does the circuit look like that is connected to those two pins? What is the impedance? How does the quality and microfads of the two caps effect the settling time of the final output?  I am looking at a step to full scale and see it takes what seems like 30 seconds to settle to a final value in microvolts. During the 30 seconds, the level moved by tens of microvolts until the final value is reached.  The reference input appears stable so it seems like these two caps may have something to do with that.  Can soakage do this?

  • 0
    TI__Guru** 113765 points

    Al,

    I don't understand why you are seeing a large settling time.  It should be in the order of milliseconds with 15 milliseconds worst case.  What kind of load do you have at the output?  The caps do affect the settling time.  There are register bits in the CMR that control fast settling behavior.  See Table 10 on page 15 of the datasheet.

    The capacitors are part of the continuous time output filter.  The filter performs a differential to single ended conversion as well as filtering out any clock component.  As a result, this filter helps to determine the noise bandwidth of the system.  The placement of these caps are critical.  Also, the kind of caps you use is critical.  Dielectric absorption could be an issue, but in this case you probably just have noisy caps, or cap placement that may be affecting the noise. 

    Take a look at the EVM guide found at the link below.  This shows the capacitors used (PPS film) and the layout that was used to get datasheet performance.

    http://focus.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=sbau102&fileType=pdf

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Prodigy 100 points
    Hi Bob,
     
    Thanks for sending the suggestions and the EVM info.  In regards to the load, it is looking into a summing junction via a 10k resistor. No caps in that signal path other than the C1 & C2 caps called for in the data sheet.  Settling time is default.   I suspect upgrading the cap to film instead of XR7 may cure the problem.  I have some parts on the way that have low disapation and are film.
     
    Thanks
    Al