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DAC8760: Output alters as AVdd and AVss ramps up/down

Part Number: DAC8760

Hi,

I use the DAC8760 in an industrial application. Vdd is applied by an external switching regulator. Whenever I ramp up the AVdd and AVss the output changes for several hundred mV over the time a few dozen ms (regardless whether the output is active or blanked). Is there any way to avoid this behaviour?

Iout and Vout are used on the same pin.

Regards

Lukas

  • Hi Lukas,

    Can you provide scope capture of the output and AVdd/AVss during power on? It is normal to have some power on glitch as described in the datasheet but I would not expect it to last for ms.

    Thanks,
    Garrett
  • Hi Garret,

    thanks for the quick reply. The glitch exceeds the level noted in the datasheet significantly. Please find the requested scope captures appended to the reply.

    CH1 - external 24V supply
    CH2 - output
    CH3 - Vssa
    CH4 - Vdda

    Please note that I will be on holiday vacation from December 20th to January 2nd.

    With switching of the Vssa earlier I achieve the following powerdown:

  • Hi Lukas,

    Thanks for providing the scope captures.

    The glitch on Vout is specified with a 1kohm load in the datasheet. I suspect this is due to having the output floating during power on. If you were using the outputs separately you could connect a load resistor to Vout to minimize the glitch. This would cause error since you are using Vout and Iout tied together during current output mode. One option is to add a load resistor in series with a switch that would connect the resistor during power on but disconnect it during operation.

    Are you using external DVDD? If this is an option you could try having DVDD come up before AVDD/AVSS to power the internal circuitry, which should reduce the glitch.

    Thanks,
    Garrett
  • Hi Lukas,

    Any update on this issue?

    Thanks,
    Garrett