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ADS131A02: Status registers indicating some errors

Part Number: ADS131A02


Hii,

I’m using ADS131A02 in my design, it’s hooked up to a Raspberry pi 0 and i’m having some troubles while getting the data.

Some details about my implementation,

  • M0-High, M1 and M2 are Low. Hence configured to 24bit word, Asynchronous interrupt mode.

  • AIN1N and AIN2N are connected to AGND

  • Avdd is connected 3.3 V from Rpi.

  • VNCP is tied to AGND.

  • XTAL2 is tied to 16.384 Mhz crystal oscillator

  • Fixed word size disabled, no CRC(checked in 0x0c register).

  • Internal reference of 2.44 is enabled.

I am able to get correct response for all the commands, However, the RREG(STAT_1) keeps giving me two errors for every sample: F_ADC and F_SPI bits are set. Following the datasheet, I read the STAT_P and STAT_N registers to see which channels are exceeding the threshold and I get a 0x03 in return for both of them, meaning that all channels are exceeding the positive and negative inputs.

Regarding the SPI, when I read the STAT_S register, it is telling me that I have an error with F_FRAME ie., Not enough SCLKs are sent per frame.

Can you help me to get rid of these errors??

  • Manjushree,


    Instead of tying the analog inputs to AGND, can you tie them all to AVDD/2? This sets all analog inputs to mid-supply. I believe that the STAT_P/STAT_N registers indicate when a signal is within the comparator high or low side thresholds and that value for 000 of COMP_TH is 5% and 95% of the AVDD to AVSS value. I think AGND will trip the threshold because it's below the 5% threshold. Regardless, I'd set the inputs to mid-supply just to check if the F_ADC and the STAT_P/STAT_N flags go away.

    As for the F_FRAME flag, can you show what you are sending the device? It may help to have some logic analyzer shots to show what is being communicated to the device. With M0 high, and M1 and M2 low, this would be asynchronous interrupt mode, with 24 bit words, 24 bit data, Hamming data off.


    Joseph Wu
  • Hii Joseph,

    I will try connecting analog inputs  to AVVD/2 and check.

    Regarding F_FRAME flag, I don't have access to Logic analyser right now. Is there any way to debug this issue in the absence of logic analyser?
    Thanks,
  • Manjushree,


    When debugging digital communications, it always helps to have a logic analyzer to see what's really going on. In some cases, you have no idea if anything is coming into or going out of the microcontroller without looking at the actual lines. For other cases, it is the only way to really verify that the communication timing is correct. It just gives a quick visual confirmation that it the communication works the way you think it should from your code.

    Regardless, what are you sending to the device for each frame? Is is possible that the CRC or the Hamming code is enabled and you're not clocking it out? If you add some extra SCLK bytes, how many do you get before the error goes away? When you do add extra SCLKs and the problem goes away, what is read from the device?

    Can you read through the entire register map and report it back? (Make sure you read the registers, don't just give what you write to the device)



    Joseph Wu
  • Manjushree,


    I haven't heard from you for a while and I wanted to check to see if you've found the source of the error flag readings. Also, I wanted to see if you've gotten past the F_FRAME flag for the bytes sent.

    I'll close this post for now, but if you continue to have errors, post back and we can continue to work on this thread.


    Joseph Wu