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ADS114S06B: Should we use common or separate Ground for Medical Device using AFE4400 & ADS114s06b

Rushit Gandhi10
Prodigy 40 points
Part Number: ADS114S06B
Other Parts Discussed in Thread: AFE4400

Hello Team,

I am developing a medical device where we have two separate ground for Analog & digital via Ferrite bead.

I want to get clarity on using the separate Ground for Analog or Digital pins for AFE4400 & ADS114S06b.

As the datasheet of ADS114S06b suggest to use " Do use a single ground plane for analog and digital grounds." on page 77 of datasheet.

For AFE4400 page 6 suggests "Connect to common board ground." for all Dig & Ana ground pins.

What is the reason to use common ground for both Ground pins?

We have two different grounds available on PCB,so what should we connect it to Analog & digital separate or all to digital or all to Analog.

Quick response will be appreciated.

Regards,
Rushit

  • 0
    TI__Guru** 113765 points

    Hi Rushit,

    There are a number of reasons to use split ground planes and many reasons why you shouldn't.  One of the biggest reasons for splitting in the past has been related to power.  Large power transients and large currents from digital sources can interact with the more sensitive analog signals.  With many devices now operating at much lower power levels the splits are no longer necessary.  With good routing practices, such as keeping all analog signals separate from digital signals so that signals do not cross, there can be excellent results achieved.

    Some reasons not to split the grounds relate to EMC performance and  ground loops.  Books have been written on this topic, so the discussion in a forum is not practical.  However, monolithic IC devices are rather fragile silicon devices that can be easily damaged if over-stressed.  I do not directly support the AFE4400, but I do support the ADS114S06B.  One of the Absolute Maximum Ratings relates to AVSS to DGND for the ADS114S06B (and RX_ANA_GND, RX_DIG_GND to LED_DRV_GND for the AFE4400).  For unipolar supply devices (like the AFE4400) the restriction is pretty straightforward at +/-300mV maximum difference in the ground potential.  For the ADS114S06B it is a little more confusing as to how the spec is written, but it is basically the same.  The difference is actually based on the lowest potential of AVSS to DGND.

    The problem now is in keeping the inductance low enough between the grounds.  If you add a ferrite between the grounds you've added inductance.  If you add long ground traces you've added inductance.  Why is adding inductance an issue?  It is because any large transient current between the grounds can also cause a large voltage difference between the grounds as the inductance chokes the spike in current.  I've seen where these transients have literally blown the plastic top off of an IC.  So ferrites or any other inductance between the grounds is bad.

    If you use a split ground, then the grounds should be joined together very near the IC to limit the inductance.  This is pretty straightforward if there is only one ADC in your system, but this can be very difficult when there are multiple devices so that you do not have ground loops.

    A colleague has put together a little more detail with a pictorial perspective in the following FAQ:

    https://e2e.ti.com/support/data-converters/f/73/t/755516?tisearch=e2e-sitesearch&keymatch=faq%3Atrue

    Best regards,

    Bob B