Hi,
I have a question about the DAC5672A way to work. I have a system using the DAC5672A controled by the OMAP-L138. I have to create 2 sinus in phase. I talking to the DAC5672 by the EMIFA bus in the OMAP. So the data of each DAC channel are controled but only one and single bus. But for my technology, the data output of each channel MUST, and i insist in the "MUST", get out at the same time. So i was wondering how i could do that. If i write the 14bits of data with the EMIFA bus and latch the dac1 WRT channel, then i write a second 14bits of data and latch the channel 2 WRT. Will the data on channel 1 and channel 2 be saved until i latch the channels clock? So if i latch both channels clock with the same clock signal, the data on both channel will come out at the same time right?
If someone can help me about this, i would really appreciate it.
Regards
Valentin
