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ADS1278: How to configure the pins to send data on SPI interface

Bartosz Skrzypek
Prodigy 20 points
Part Number: ADS1278

Hello,

We have a problem with simple comunication with ADS1278. As we understand, this is read only device so if we connect properly siganl like a CLOCK and etc. it should be send the data. Th problem is that it looks complettly death, we tried to change the mode, format but we didn't receive nothing on output. We setup the format to SPI, TDM and fixed or Dynamic but it dosn't help. We have buil-in clock (27Mhz) and provide the SPI clock. We tried in few speed SPI clock but it also not give us good result. We can't see any signal on DOUT pin.

Can you give us some basic configuration, I mean what pins must be setup in basic to see some data form this chip.

We tried test function and it works.

Best Regards
--

  • 0
    TI__Mastermind 46860 points
    Hello Bartosz,

    You are correct; there are no registers to program in this part. You just need to connect the different configuration pins high or low for the different modes of operation.

    The following will configure the device for high-speed mode, with SPI, TDM, on single DOUT1 line for all 8 channels. With CLK at 27MHz, the output data rate (and frequency of /DRDY) should be 105.5kHz. I suggest measuring each pin to confirm it is at the proper level.

    IOVDD, 1.65 to 3.6V
    DVDD, 1.8V
    AVDD, 5V
    VREFP, 2.5V
    VREFN, 0V (Connect to ground)
    AGND plus PowerPad to ground
    AVDD should rise up after IOVDD/DVDD, if not, may want to pulse the /SYNC pin low for >1fclk.
    NOTE: AGND, DGND, VREFN, should all be connected to the PowerPad and the PowerPad should via into the system ground plane.

    CLK (Input) -> Should be continuous 27MHz or less, referred to IOVDD level.
    CLKDIV (Input) -> connect to IOVDD
    DIN (Input) -> connect to GND
    DOUT1 (Output) -> Output Data
    /DRDY (Output) -> Should be repetitive at fSample, 105.5ksps with CLK=27MHz
    FORMAT0..2 (Inputs) -> Connect to GND for SPI, TDM, Dynamic
    MODE0..1 (Inputs) -> Connect to GND for High Speed mode.
    /PWDN1..8 (Inputs) -> Connect all 8 inputs to IOVDD to enable converters.
    SCLK (Input) -> SPI Clk input, maximum frequency equal to CLK (27MHz)
    /SYNC (Input) -> Either connect high or toggle after power-up to reset/re-synchronize the internal counters
    TEST0..1 (Input) -> Connect to GND


    If preferred, you can connect /PWDN2..8 to GND to shutdown all channels except for Channel 1. This may make it easier to debug the SPI communications.

    I hope this helps.

    Regards,
    Keith N.
    Precision ADC Applications
  • 0 in reply to Keith Nicholas
    TI__Mastermind 46860 points
    Hello Bartosz,

    If you have any other questions, please feel free to respond to this thread or open a new one.

    Regards,
    Keith