Hello I am currently using a simple P-N enabled Load switch to power on an OpAmp and measure a Battery voltage. Problem is that this circuit takes 2 GPIO: 1 to enable the P-N FET Load switch to connect Bat+ to the OpAmp terminals and 1 used as an ADC input. While this circuit works great I am totally strapped on GPIO on this design.
VREF = Analog Supply(AVDD-AVSS) 5V-0V
Proposed Solution: Use the REFP0 and REFN0 terminals to measure the Battery voltage by directly connecting BAT+ to REFP0 and GND to REFN0. Firmware will alternate the ADS1220 MUX settings between the AINx inputs and occasionally switch to read the REFP0 & REFN0 inputs to measure the Battery voltage.
Concerns: While I am convinced the solution proposed above would work I do have some concerns that I hope someone can set at ease OR provide me some warnings on the method above to avoid possible pitfalls.
1) Having BAT+ and GND directly wired to the REFP0/REFN0 inputs even if the MUX selection is on a different setting would there be a substantial leakage path? From the DS I am seeing the VREF inputs showing what appears to be +/-10nA leakage is that correct?
2) I understand there is a bit of a penalty IF the VREF inputs are used with an external Reference because it enables the Buffers(70uA). Just changing the MUX selection to (VREFP0-VREFN0 )/ 4 to measure the battery voltage(BAT+ will always be less than AVDD)also enable these buffers?
3) Are the any issues with periodically changing the MUX input from AINx to the ( VREFP0 - VREFN0 ) / 4 settings that are not obvious? The BAT+ measurement would be on a much greater interval than the AINx measurement rate minutes vs. ms for AINx sampling rates.
Mainly just want to validate there won't be any unforeseen significant current leakage paths and ensure it is safe to switch the MUX on a relatively periodic interval. Seems like this is what this part is made to do but want to do a sanity check before putting a PCB into fabrication.
Many Thanks,
Frank
